0018-nvmem-sunxi_sid-Drop-the-workaround-on-A64.patch 1.6 KB

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  1. From db71abf941d25b92b2117780d3771197417d1c81 Mon Sep 17 00:00:00 2001
  2. From: Samuel Holland <[email protected]>
  3. Date: Sun, 31 Jul 2022 20:34:20 -0500
  4. Subject: [PATCH 018/117] nvmem: sunxi_sid: Drop the workaround on A64
  5. Now that the SRAM readout code is fixed by using 32-bit accesses, it
  6. always returns the same values as register readout, so the A64 variant
  7. no longer needs the workaround. This makes the D1 variant structure
  8. redundant, so remove it.
  9. Signed-off-by: Samuel Holland <[email protected]>
  10. ---
  11. drivers/nvmem/sunxi_sid.c | 8 +-------
  12. 1 file changed, 1 insertion(+), 7 deletions(-)
  13. --- a/drivers/nvmem/sunxi_sid.c
  14. +++ b/drivers/nvmem/sunxi_sid.c
  15. @@ -196,15 +196,9 @@ static const struct sunxi_sid_cfg sun8i_
  16. .need_register_readout = true,
  17. };
  18. -static const struct sunxi_sid_cfg sun20i_d1_cfg = {
  19. - .value_offset = 0x200,
  20. - .size = 0x100,
  21. -};
  22. -
  23. static const struct sunxi_sid_cfg sun50i_a64_cfg = {
  24. .value_offset = 0x200,
  25. .size = 0x100,
  26. - .need_register_readout = true,
  27. };
  28. static const struct sunxi_sid_cfg sun50i_h6_cfg = {
  29. @@ -217,7 +211,7 @@ static const struct of_device_id sunxi_s
  30. { .compatible = "allwinner,sun7i-a20-sid", .data = &sun7i_a20_cfg },
  31. { .compatible = "allwinner,sun8i-a83t-sid", .data = &sun50i_a64_cfg },
  32. { .compatible = "allwinner,sun8i-h3-sid", .data = &sun8i_h3_cfg },
  33. - { .compatible = "allwinner,sun20i-d1-sid", .data = &sun20i_d1_cfg },
  34. + { .compatible = "allwinner,sun20i-d1-sid", .data = &sun50i_a64_cfg },
  35. { .compatible = "allwinner,sun50i-a64-sid", .data = &sun50i_a64_cfg },
  36. { .compatible = "allwinner,sun50i-h5-sid", .data = &sun50i_a64_cfg },
  37. { .compatible = "allwinner,sun50i-h6-sid", .data = &sun50i_h6_cfg },