0032-riscv-dts-allwinner-Add-Dongshan-Nezha-STU-devicetre.patch 3.6 KB

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  1. From 1f26c90ac9cbb60ff315c552368a3bca16562e51 Mon Sep 17 00:00:00 2001
  2. From: Samuel Holland <[email protected]>
  3. Date: Sun, 10 Jul 2022 11:24:42 -0500
  4. Subject: [PATCH 032/117] riscv: dts: allwinner: Add Dongshan Nezha STU
  5. devicetree
  6. The 100ask Dongshan Nezha STU is a system-on-module that can be used
  7. standalone or with a carrier board. The SoM provides gigabit Ethernet,
  8. HDMI, a USB peripheral port, and WiFi/Bluetooth via an RTL8723DS chip.
  9. The "DIY" carrier board exposes almost every pin from the D1 SoC to 0.1"
  10. headers, but contains no digital circuitry, so it does not have its own
  11. devicetree.
  12. Signed-off-by: Samuel Holland <[email protected]>
  13. ---
  14. arch/riscv/boot/dts/allwinner/Makefile | 1 +
  15. .../sun20i-d1-dongshan-nezha-stu.dts | 114 ++++++++++++++++++
  16. 2 files changed, 115 insertions(+)
  17. create mode 100644 arch/riscv/boot/dts/allwinner/sun20i-d1-dongshan-nezha-stu.dts
  18. --- a/arch/riscv/boot/dts/allwinner/Makefile
  19. +++ b/arch/riscv/boot/dts/allwinner/Makefile
  20. @@ -1,4 +1,5 @@
  21. # SPDX-License-Identifier: GPL-2.0
  22. +dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1-dongshan-nezha-stu.dtb
  23. dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1-lichee-rv-86-panel-480p.dtb
  24. dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1-lichee-rv-86-panel-720p.dtb
  25. dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1-lichee-rv-dock.dtb
  26. --- /dev/null
  27. +++ b/arch/riscv/boot/dts/allwinner/sun20i-d1-dongshan-nezha-stu.dts
  28. @@ -0,0 +1,114 @@
  29. +// SPDX-License-Identifier: (GPL-2.0+ or MIT)
  30. +// Copyright (C) 2022 Samuel Holland <[email protected]>
  31. +
  32. +/dts-v1/;
  33. +
  34. +#include <dt-bindings/gpio/gpio.h>
  35. +#include <dt-bindings/leds/common.h>
  36. +
  37. +#include "sun20i-d1.dtsi"
  38. +#include "sun20i-d1-common-regulators.dtsi"
  39. +
  40. +/ {
  41. + model = "Dongshan Nezha STU";
  42. + compatible = "100ask,dongshan-nezha-stu", "allwinner,sun20i-d1";
  43. +
  44. + aliases {
  45. + ethernet0 = &emac;
  46. + mmc0 = &mmc0;
  47. + serial0 = &uart0;
  48. + };
  49. +
  50. + chosen {
  51. + stdout-path = "serial0:115200n8";
  52. + };
  53. +
  54. + leds {
  55. + compatible = "gpio-leds";
  56. +
  57. + led-0 {
  58. + color = <LED_COLOR_ID_GREEN>;
  59. + function = LED_FUNCTION_STATUS;
  60. + gpios = <&pio 2 1 GPIO_ACTIVE_HIGH>; /* PC1 */
  61. + };
  62. + };
  63. +
  64. + reg_usbvbus: usbvbus {
  65. + compatible = "regulator-fixed";
  66. + regulator-name = "usbvbus";
  67. + regulator-min-microvolt = <5000000>;
  68. + regulator-max-microvolt = <5000000>;
  69. + gpio = <&pio 3 19 GPIO_ACTIVE_HIGH>; /* PD19 */
  70. + enable-active-high;
  71. + vin-supply = <&reg_vcc>;
  72. + };
  73. +
  74. + /*
  75. + * This regulator is PWM-controlled, but the PWM controller is not
  76. + * yet supported, so fix the regulator to its default voltage.
  77. + */
  78. + reg_vdd_cpu: vdd-cpu {
  79. + compatible = "regulator-fixed";
  80. + regulator-name = "vdd-cpu";
  81. + regulator-min-microvolt = <1100000>;
  82. + regulator-max-microvolt = <1100000>;
  83. + vin-supply = <&reg_vcc>;
  84. + };
  85. +};
  86. +
  87. +&cpu0 {
  88. + cpu-supply = <&reg_vdd_cpu>;
  89. +};
  90. +
  91. +&ehci0 {
  92. + status = "okay";
  93. +};
  94. +
  95. +&emac {
  96. + pinctrl-0 = <&rgmii_pe_pins>;
  97. + pinctrl-names = "default";
  98. + phy-handle = <&ext_rgmii_phy>;
  99. + phy-mode = "rgmii-id";
  100. + phy-supply = <&reg_vcc_3v3>;
  101. + status = "okay";
  102. +};
  103. +
  104. +&mdio {
  105. + ext_rgmii_phy: ethernet-phy@1 {
  106. + compatible = "ethernet-phy-ieee802.3-c22";
  107. + reg = <1>;
  108. + };
  109. +};
  110. +
  111. +&mmc0 {
  112. + broken-cd;
  113. + bus-width = <4>;
  114. + disable-wp;
  115. + vmmc-supply = <&reg_vcc_3v3>;
  116. + vqmmc-supply = <&reg_vcc_3v3>;
  117. + pinctrl-0 = <&mmc0_pins>;
  118. + pinctrl-names = "default";
  119. + status = "okay";
  120. +};
  121. +
  122. +&ohci0 {
  123. + status = "okay";
  124. +};
  125. +
  126. +&uart0 {
  127. + pinctrl-0 = <&uart0_pb8_pins>;
  128. + pinctrl-names = "default";
  129. + status = "okay";
  130. +};
  131. +
  132. +&usb_otg {
  133. + dr_mode = "otg";
  134. + status = "okay";
  135. +};
  136. +
  137. +&usbphy {
  138. + usb0_id_det-gpios = <&pio 3 21 GPIO_ACTIVE_HIGH>; /* PD21 */
  139. + usb0_vbus_det-gpios = <&pio 3 20 GPIO_ACTIVE_HIGH>; /* PD20 */
  140. + usb0_vbus-supply = <&reg_usbvbus>;
  141. + status = "okay";
  142. +};