1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950 |
- From b300b013de16109f833782d9f4e7ee8cc204780f Mon Sep 17 00:00:00 2001
- From: Samuel Holland <[email protected]>
- Date: Sat, 17 Jul 2021 11:19:29 -0500
- Subject: [PATCH 077/117] spi: spi-sun6i: Dual/Quad RX Support
- Signed-off-by: Samuel Holland <[email protected]>
- ---
- drivers/spi/spi-sun6i.c | 17 +++++++++++++++--
- 1 file changed, 15 insertions(+), 2 deletions(-)
- --- a/drivers/spi/spi-sun6i.c
- +++ b/drivers/spi/spi-sun6i.c
- @@ -82,6 +82,8 @@
- #define SUN6I_XMIT_CNT_REG 0x34
-
- #define SUN6I_BURST_CTL_CNT_REG 0x38
- +#define SUN6I_BURST_CTL_CNT_QUAD_EN BIT(29)
- +#define SUN6I_BURST_CTL_CNT_DUAL_EN BIT(28)
-
- #define SUN6I_TXDATA_REG 0x200
- #define SUN6I_RXDATA_REG 0x300
- @@ -415,7 +417,17 @@ static int sun6i_spi_transfer_one(struct
- /* Setup the counters */
- sun6i_spi_write(sspi, SUN6I_BURST_CNT_REG, tfr->len);
- sun6i_spi_write(sspi, SUN6I_XMIT_CNT_REG, tx_len);
- - sun6i_spi_write(sspi, SUN6I_BURST_CTL_CNT_REG, tx_len);
- +
- + reg = tx_len;
- + switch (tfr->rx_nbits) {
- + case SPI_NBITS_QUAD:
- + reg |= SUN6I_BURST_CTL_CNT_QUAD_EN;
- + break;
- + case SPI_NBITS_DUAL:
- + reg |= SUN6I_BURST_CTL_CNT_DUAL_EN;
- + break;
- + }
- + sun6i_spi_write(sspi, SUN6I_BURST_CTL_CNT_REG, reg);
-
- if (!use_dma) {
- /* Fill the TX FIFO */
- @@ -632,7 +644,8 @@ static int sun6i_spi_probe(struct platfo
- master->set_cs = sun6i_spi_set_cs;
- master->transfer_one = sun6i_spi_transfer_one;
- master->num_chipselect = 4;
- - master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST;
- + master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST
- + | SPI_RX_DUAL | SPI_RX_QUAD;
- master->bits_per_word_mask = SPI_BPW_MASK(8);
- master->dev.of_node = pdev->dev.of_node;
- master->auto_runtime_pm = true;
|