036-v6.4-0005-arm64-dts-broadcom-bcmbca-bcm4908-add-on-SoC-USB-por.patch 2.0 KB

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  1. From 477cad715de1dfc256a20da3ed83b62f3cb2944d Mon Sep 17 00:00:00 2001
  2. From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <[email protected]>
  3. Date: Tue, 28 Feb 2023 15:45:18 +0100
  4. Subject: [PATCH] arm64: dts: broadcom: bcmbca: bcm4908: add on-SoC USB ports
  5. MIME-Version: 1.0
  6. Content-Type: text/plain; charset=UTF-8
  7. Content-Transfer-Encoding: 8bit
  8. BCM4908 has 3 USB controllers each with 2 USB ports. Home routers often
  9. have LEDs indicating state of selected USB ports. Describe those SoC USB
  10. ports to allow using them as LED trigger sources.
  11. Signed-off-by: Rafał Miłecki <[email protected]>
  12. Link: https://lore.kernel.org/all/[email protected]/
  13. Signed-off-by: Florian Fainelli <[email protected]>
  14. ---
  15. .../boot/dts/broadcom/bcmbca/bcm4908.dtsi | 39 +++++++++++++++++++
  16. 1 file changed, 39 insertions(+)
  17. --- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
  18. +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
  19. @@ -148,6 +148,19 @@
  20. interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
  21. phys = <&usb_phy PHY_TYPE_USB2>;
  22. status = "disabled";
  23. +
  24. + #address-cells = <1>;
  25. + #size-cells = <0>;
  26. +
  27. + ehci_port1: port@1 {
  28. + reg = <1>;
  29. + #trigger-source-cells = <0>;
  30. + };
  31. +
  32. + ehci_port2: port@2 {
  33. + reg = <2>;
  34. + #trigger-source-cells = <0>;
  35. + };
  36. };
  37. ohci: usb@c400 {
  38. @@ -156,6 +169,19 @@
  39. interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
  40. phys = <&usb_phy PHY_TYPE_USB2>;
  41. status = "disabled";
  42. +
  43. + #address-cells = <1>;
  44. + #size-cells = <0>;
  45. +
  46. + ohci_port1: port@1 {
  47. + reg = <1>;
  48. + #trigger-source-cells = <0>;
  49. + };
  50. +
  51. + ohci_port2: port@2 {
  52. + reg = <2>;
  53. + #trigger-source-cells = <0>;
  54. + };
  55. };
  56. xhci: usb@d000 {
  57. @@ -164,6 +190,19 @@
  58. interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
  59. phys = <&usb_phy PHY_TYPE_USB3>;
  60. status = "disabled";
  61. +
  62. + #address-cells = <1>;
  63. + #size-cells = <0>;
  64. +
  65. + xhci_port1: port@1 {
  66. + reg = <1>;
  67. + #trigger-source-cells = <0>;
  68. + };
  69. +
  70. + xhci_port2: port@2 {
  71. + reg = <2>;
  72. + #trigger-source-cells = <0>;
  73. + };
  74. };
  75. bus@80000 {