210-revert-macronix-nand-block-protection.patch 3.5 KB

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  1. From 5a37811de679bff03e9c5a746f75574910ede964 Mon Sep 17 00:00:00 2001
  2. From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <[email protected]>
  3. Date: Wed, 22 Mar 2023 20:52:13 +0100
  4. Subject: [PATCH] Revert "mtd: rawnand: Macronix: Add support for block
  5. protection"
  6. MIME-Version: 1.0
  7. Content-Type: text/plain; charset=UTF-8
  8. Content-Transfer-Encoding: 8bit
  9. This reverts commit 03a539c7a118427a6609a26461358c56ac8f3a06.
  10. Macronix block protection doesn't seem to be supported on Sercomm H-500s
  11. devices since it hangs the device.
  12. Signed-off-by: Álvaro Fernández Rojas <[email protected]>
  13. ---
  14. drivers/mtd/nand/raw/nand_macronix.c | 72 ----------------------------
  15. 1 file changed, 72 deletions(-)
  16. --- a/drivers/mtd/nand/raw/nand_macronix.c
  17. +++ b/drivers/mtd/nand/raw/nand_macronix.c
  18. @@ -12,10 +12,6 @@
  19. #define MACRONIX_READ_RETRY_BIT BIT(0)
  20. #define MACRONIX_NUM_READ_RETRY_MODES 6
  21. -#define ONFI_FEATURE_ADDR_MXIC_PROTECTION 0xA0
  22. -#define MXIC_BLOCK_PROTECTION_ALL_LOCK 0x38
  23. -#define MXIC_BLOCK_PROTECTION_ALL_UNLOCK 0x0
  24. -
  25. #define ONFI_FEATURE_ADDR_MXIC_RANDOMIZER 0xB0
  26. #define MACRONIX_RANDOMIZER_BIT BIT(1)
  27. #define MACRONIX_RANDOMIZER_ENPGM BIT(0)
  28. @@ -179,73 +175,6 @@ static void macronix_nand_fix_broken_get
  29. ONFI_FEATURE_ADDR_TIMING_MODE, 1);
  30. }
  31. -/*
  32. - * Macronix NAND supports Block Protection by Protectoin(PT) pin;
  33. - * active high at power-on which protects the entire chip even the #WP is
  34. - * disabled. Lock/unlock protection area can be partition according to
  35. - * protection bits, i.e. upper 1/2 locked, upper 1/4 locked and so on.
  36. - */
  37. -static int mxic_nand_lock(struct nand_chip *chip, loff_t ofs, uint64_t len)
  38. -{
  39. - u8 feature[ONFI_SUBFEATURE_PARAM_LEN];
  40. - int ret;
  41. -
  42. - feature[0] = MXIC_BLOCK_PROTECTION_ALL_LOCK;
  43. - nand_select_target(chip, 0);
  44. - ret = nand_set_features(chip, ONFI_FEATURE_ADDR_MXIC_PROTECTION,
  45. - feature);
  46. - nand_deselect_target(chip);
  47. - if (ret)
  48. - pr_err("%s all blocks failed\n", __func__);
  49. -
  50. - return ret;
  51. -}
  52. -
  53. -static int mxic_nand_unlock(struct nand_chip *chip, loff_t ofs, uint64_t len)
  54. -{
  55. - u8 feature[ONFI_SUBFEATURE_PARAM_LEN];
  56. - int ret;
  57. -
  58. - feature[0] = MXIC_BLOCK_PROTECTION_ALL_UNLOCK;
  59. - nand_select_target(chip, 0);
  60. - ret = nand_set_features(chip, ONFI_FEATURE_ADDR_MXIC_PROTECTION,
  61. - feature);
  62. - nand_deselect_target(chip);
  63. - if (ret)
  64. - pr_err("%s all blocks failed\n", __func__);
  65. -
  66. - return ret;
  67. -}
  68. -
  69. -static void macronix_nand_block_protection_support(struct nand_chip *chip)
  70. -{
  71. - u8 feature[ONFI_SUBFEATURE_PARAM_LEN];
  72. - int ret;
  73. -
  74. - bitmap_set(chip->parameters.get_feature_list,
  75. - ONFI_FEATURE_ADDR_MXIC_PROTECTION, 1);
  76. -
  77. - feature[0] = MXIC_BLOCK_PROTECTION_ALL_UNLOCK;
  78. - nand_select_target(chip, 0);
  79. - ret = nand_get_features(chip, ONFI_FEATURE_ADDR_MXIC_PROTECTION,
  80. - feature);
  81. - nand_deselect_target(chip);
  82. - if (ret || feature[0] != MXIC_BLOCK_PROTECTION_ALL_LOCK) {
  83. - if (ret)
  84. - pr_err("Block protection check failed\n");
  85. -
  86. - bitmap_clear(chip->parameters.get_feature_list,
  87. - ONFI_FEATURE_ADDR_MXIC_PROTECTION, 1);
  88. - return;
  89. - }
  90. -
  91. - bitmap_set(chip->parameters.set_feature_list,
  92. - ONFI_FEATURE_ADDR_MXIC_PROTECTION, 1);
  93. -
  94. - chip->ops.lock_area = mxic_nand_lock;
  95. - chip->ops.unlock_area = mxic_nand_unlock;
  96. -}
  97. -
  98. static int nand_power_down_op(struct nand_chip *chip)
  99. {
  100. int ret;
  101. @@ -323,7 +252,6 @@ static int macronix_nand_init(struct nan
  102. macronix_nand_fix_broken_get_timings(chip);
  103. macronix_nand_onfi_init(chip);
  104. - macronix_nand_block_protection_support(chip);
  105. macronix_nand_deep_power_down_support(chip);
  106. return 0;