790-16-v6.4-net-dsa-mt7530-set-all-CPU-ports-in-MT7531_CPU_PMAP.patch 3.0 KB

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  1. From 4b11e3eb0eb7245a0d22a5dc4161c54eea42910c Mon Sep 17 00:00:00 2001
  2. From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <[email protected]>
  3. Date: Sat, 17 Jun 2023 09:26:44 +0300
  4. Subject: [PATCH 16/48] net: dsa: mt7530: set all CPU ports in MT7531_CPU_PMAP
  5. MIME-Version: 1.0
  6. Content-Type: text/plain; charset=UTF-8
  7. Content-Transfer-Encoding: 8bit
  8. MT7531_CPU_PMAP represents the destination port mask for trapped-to-CPU
  9. frames (further restricted by PCR_MATRIX).
  10. Currently the driver sets the first CPU port as the single port in this bit
  11. mask, which works fine regardless of whether the device tree defines port
  12. 5, 6 or 5+6 as CPU ports. This is because the logic coincides with DSA's
  13. logic of picking the first CPU port as the CPU port that all user ports are
  14. affine to, by default.
  15. An upcoming change would like to influence DSA's selection of the default
  16. CPU port to no longer be the first one, and in that case, this logic needs
  17. adaptation.
  18. Since there is no observed leakage or duplication of frames if all CPU
  19. ports are defined in this bit mask, simply include them all.
  20. Suggested-by: Russell King (Oracle) <[email protected]>
  21. Suggested-by: Vladimir Oltean <[email protected]>
  22. Signed-off-by: Arınç ÜNAL <[email protected]>
  23. Reviewed-by: Vladimir Oltean <[email protected]>
  24. Reviewed-by: Russell King (Oracle) <[email protected]>
  25. Reviewed-by: Florian Fainelli <[email protected]>
  26. Signed-off-by: David S. Miller <[email protected]>
  27. ---
  28. drivers/net/dsa/mt7530.c | 15 +++++++--------
  29. drivers/net/dsa/mt7530.h | 1 +
  30. 2 files changed, 8 insertions(+), 8 deletions(-)
  31. --- a/drivers/net/dsa/mt7530.c
  32. +++ b/drivers/net/dsa/mt7530.c
  33. @@ -1069,6 +1069,13 @@ mt753x_cpu_port_enable(struct dsa_switch
  34. if (priv->id == ID_MT7530 || priv->id == ID_MT7621)
  35. mt7530_rmw(priv, MT7530_MFC, CPU_MASK, CPU_EN | CPU_PORT(port));
  36. + /* Add the CPU port to the CPU port bitmap for MT7531 and the switch on
  37. + * the MT7988 SoC. Trapped frames will be forwarded to the CPU port that
  38. + * is affine to the inbound user port.
  39. + */
  40. + if (priv->id == ID_MT7531 || priv->id == ID_MT7988)
  41. + mt7530_set(priv, MT7531_CFC, MT7531_CPU_PMAP(BIT(port)));
  42. +
  43. /* CPU port gets connected to all user ports of
  44. * the switch.
  45. */
  46. @@ -2411,16 +2418,8 @@ static int
  47. mt7531_setup_common(struct dsa_switch *ds)
  48. {
  49. struct mt7530_priv *priv = ds->priv;
  50. - struct dsa_port *cpu_dp;
  51. int ret, i;
  52. - /* BPDU to CPU port */
  53. - dsa_switch_for_each_cpu_port(cpu_dp, ds) {
  54. - mt7530_rmw(priv, MT7531_CFC, MT7531_CPU_PMAP_MASK,
  55. - BIT(cpu_dp->index));
  56. - break;
  57. - }
  58. -
  59. mt753x_trap_frames(priv);
  60. /* Enable and reset MIB counters */
  61. --- a/drivers/net/dsa/mt7530.h
  62. +++ b/drivers/net/dsa/mt7530.h
  63. @@ -54,6 +54,7 @@ enum mt753x_id {
  64. #define MT7531_MIRROR_PORT_GET(x) (((x) >> 16) & MIRROR_MASK)
  65. #define MT7531_MIRROR_PORT_SET(x) (((x) & MIRROR_MASK) << 16)
  66. #define MT7531_CPU_PMAP_MASK GENMASK(7, 0)
  67. +#define MT7531_CPU_PMAP(x) FIELD_PREP(MT7531_CPU_PMAP_MASK, x)
  68. #define MT753X_MIRROR_REG(id) ((((id) == ID_MT7531) || ((id) == ID_MT7988)) ? \
  69. MT7531_CFC : MT7530_MFC)