790-25-v6.9-net-dsa-mt7530-store-port-5-SGMII-capability-of-MT75.patch 7.2 KB

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  1. From b0d590a5cdd95ed863717b279751d6166083889f Mon Sep 17 00:00:00 2001
  2. From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <[email protected]>
  3. Date: Mon, 22 Jan 2024 08:35:54 +0300
  4. Subject: [PATCH 25/48] net: dsa: mt7530: store port 5 SGMII capability of
  5. MT7531
  6. MIME-Version: 1.0
  7. Content-Type: text/plain; charset=UTF-8
  8. Content-Transfer-Encoding: 8bit
  9. Introduce the p5_sgmii field to store the information for whether port 5
  10. has got SGMII or not. Instead of reading the MT7531_TOP_SIG_SR register
  11. multiple times, the register will be read once and the value will be
  12. stored on the p5_sgmii field. This saves unnecessary reads of the
  13. register.
  14. Move the comment about MT7531AE and MT7531BE to mt7531_setup(), where the
  15. switch is identified.
  16. Get rid of mt7531_dual_sgmii_supported() now that priv->p5_sgmii stores the
  17. information. Address the code where mt7531_dual_sgmii_supported() is used.
  18. Get rid of mt7531_is_rgmii_port() which just prints the opposite of
  19. priv->p5_sgmii.
  20. Instead of calling mt7531_pll_setup() then returning, do not call it if
  21. port 5 is SGMII.
  22. Remove P5_INTF_SEL_GMAC5_SGMII. The p5_interface_select enum is supposed to
  23. represent the mode that port 5 is being used in, not the hardware
  24. information of port 5. Set p5_intf_sel to P5_INTF_SEL_GMAC5 instead, if
  25. port 5 is not dsa_is_unused_port().
  26. Signed-off-by: Arınç ÜNAL <[email protected]>
  27. Acked-by: Daniel Golle <[email protected]>
  28. Reviewed-by: Vladimir Oltean <[email protected]>
  29. Link: https://lore.kernel.org/r/20240122-for-netnext-mt7530-improvements-1-v3-3-042401f2b279@arinc9.com
  30. Signed-off-by: Jakub Kicinski <[email protected]>
  31. ---
  32. drivers/net/dsa/mt7530-mdio.c | 7 ++---
  33. drivers/net/dsa/mt7530.c | 48 ++++++++++++-----------------------
  34. drivers/net/dsa/mt7530.h | 6 +++--
  35. 3 files changed, 22 insertions(+), 39 deletions(-)
  36. --- a/drivers/net/dsa/mt7530-mdio.c
  37. +++ b/drivers/net/dsa/mt7530-mdio.c
  38. @@ -81,17 +81,14 @@ static const struct regmap_bus mt7530_re
  39. };
  40. static int
  41. -mt7531_create_sgmii(struct mt7530_priv *priv, bool dual_sgmii)
  42. +mt7531_create_sgmii(struct mt7530_priv *priv)
  43. {
  44. struct regmap_config *mt7531_pcs_config[2] = {};
  45. struct phylink_pcs *pcs;
  46. struct regmap *regmap;
  47. int i, ret = 0;
  48. - /* MT7531AE has two SGMII units for port 5 and port 6
  49. - * MT7531BE has only one SGMII unit for port 6
  50. - */
  51. - for (i = dual_sgmii ? 0 : 1; i < 2; i++) {
  52. + for (i = priv->p5_sgmii ? 0 : 1; i < 2; i++) {
  53. mt7531_pcs_config[i] = devm_kzalloc(priv->dev,
  54. sizeof(struct regmap_config),
  55. GFP_KERNEL);
  56. --- a/drivers/net/dsa/mt7530.c
  57. +++ b/drivers/net/dsa/mt7530.c
  58. @@ -473,15 +473,6 @@ mt7530_pad_clk_setup(struct dsa_switch *
  59. return 0;
  60. }
  61. -static bool mt7531_dual_sgmii_supported(struct mt7530_priv *priv)
  62. -{
  63. - u32 val;
  64. -
  65. - val = mt7530_read(priv, MT7531_TOP_SIG_SR);
  66. -
  67. - return (val & PAD_DUAL_SGMII_EN) != 0;
  68. -}
  69. -
  70. static int
  71. mt7531_pad_setup(struct dsa_switch *ds, phy_interface_t interface)
  72. {
  73. @@ -496,9 +487,6 @@ mt7531_pll_setup(struct mt7530_priv *pri
  74. u32 xtal;
  75. u32 val;
  76. - if (mt7531_dual_sgmii_supported(priv))
  77. - return;
  78. -
  79. val = mt7530_read(priv, MT7531_CREV);
  80. top_sig = mt7530_read(priv, MT7531_TOP_SIG_SR);
  81. hwstrap = mt7530_read(priv, MT7531_HWTRAP);
  82. @@ -913,8 +901,6 @@ static const char *p5_intf_modes(unsigne
  83. return "PHY P4";
  84. case P5_INTF_SEL_GMAC5:
  85. return "GMAC5";
  86. - case P5_INTF_SEL_GMAC5_SGMII:
  87. - return "GMAC5_SGMII";
  88. default:
  89. return "unknown";
  90. }
  91. @@ -2515,6 +2501,12 @@ mt7531_setup(struct dsa_switch *ds)
  92. return -ENODEV;
  93. }
  94. + /* MT7531AE has got two SGMII units. One for port 5, one for port 6.
  95. + * MT7531BE has got only one SGMII unit which is for port 6.
  96. + */
  97. + val = mt7530_read(priv, MT7531_TOP_SIG_SR);
  98. + priv->p5_sgmii = !!(val & PAD_DUAL_SGMII_EN);
  99. +
  100. /* all MACs must be forced link-down before sw reset */
  101. for (i = 0; i < MT7530_NUM_PORTS; i++)
  102. mt7530_write(priv, MT7530_PMCR_P(i), MT7531_FORCE_LNK);
  103. @@ -2524,21 +2516,18 @@ mt7531_setup(struct dsa_switch *ds)
  104. SYS_CTRL_PHY_RST | SYS_CTRL_SW_RST |
  105. SYS_CTRL_REG_RST);
  106. - mt7531_pll_setup(priv);
  107. -
  108. - if (mt7531_dual_sgmii_supported(priv)) {
  109. - priv->p5_intf_sel = P5_INTF_SEL_GMAC5_SGMII;
  110. -
  111. + if (!priv->p5_sgmii) {
  112. + mt7531_pll_setup(priv);
  113. + } else {
  114. /* Let ds->slave_mii_bus be able to access external phy. */
  115. mt7530_rmw(priv, MT7531_GPIO_MODE1, MT7531_GPIO11_RG_RXD2_MASK,
  116. MT7531_EXT_P_MDC_11);
  117. mt7530_rmw(priv, MT7531_GPIO_MODE1, MT7531_GPIO12_RG_RXD3_MASK,
  118. MT7531_EXT_P_MDIO_12);
  119. - } else {
  120. - priv->p5_intf_sel = P5_INTF_SEL_GMAC5;
  121. }
  122. - dev_dbg(ds->dev, "P5 support %s interface\n",
  123. - p5_intf_modes(priv->p5_intf_sel));
  124. +
  125. + if (!dsa_is_unused_port(ds, 5))
  126. + priv->p5_intf_sel = P5_INTF_SEL_GMAC5;
  127. mt7530_rmw(priv, MT7531_GPIO_MODE0, MT7531_GPIO0_MASK,
  128. MT7531_GPIO0_INTERRUPT);
  129. @@ -2598,11 +2587,6 @@ static void mt7530_mac_port_get_caps(str
  130. }
  131. }
  132. -static bool mt7531_is_rgmii_port(struct mt7530_priv *priv, u32 port)
  133. -{
  134. - return (port == 5) && (priv->p5_intf_sel != P5_INTF_SEL_GMAC5_SGMII);
  135. -}
  136. -
  137. static void mt7531_mac_port_get_caps(struct dsa_switch *ds, int port,
  138. struct phylink_config *config)
  139. {
  140. @@ -2615,7 +2599,7 @@ static void mt7531_mac_port_get_caps(str
  141. break;
  142. case 5: /* 2nd cpu port supports either rgmii or sgmii/8023z */
  143. - if (mt7531_is_rgmii_port(priv, port)) {
  144. + if (!priv->p5_sgmii) {
  145. phy_interface_set_rgmii(config->supported_interfaces);
  146. break;
  147. }
  148. @@ -2682,7 +2666,7 @@ static int mt7531_rgmii_setup(struct mt7
  149. {
  150. u32 val;
  151. - if (!mt7531_is_rgmii_port(priv, port)) {
  152. + if (priv->p5_sgmii) {
  153. dev_err(priv->dev, "RGMII mode is not available for port %d\n",
  154. port);
  155. return -EINVAL;
  156. @@ -2925,7 +2909,7 @@ mt7531_cpu_port_config(struct dsa_switch
  157. switch (port) {
  158. case 5:
  159. - if (mt7531_is_rgmii_port(priv, port))
  160. + if (!priv->p5_sgmii)
  161. interface = PHY_INTERFACE_MODE_RGMII;
  162. else
  163. interface = PHY_INTERFACE_MODE_2500BASEX;
  164. @@ -3083,7 +3067,7 @@ mt753x_setup(struct dsa_switch *ds)
  165. mt7530_free_irq_common(priv);
  166. if (priv->create_sgmii) {
  167. - ret = priv->create_sgmii(priv, mt7531_dual_sgmii_supported(priv));
  168. + ret = priv->create_sgmii(priv);
  169. if (ret && priv->irq)
  170. mt7530_free_irq(priv);
  171. }
  172. --- a/drivers/net/dsa/mt7530.h
  173. +++ b/drivers/net/dsa/mt7530.h
  174. @@ -707,7 +707,6 @@ enum p5_interface_select {
  175. P5_INTF_SEL_PHY_P0,
  176. P5_INTF_SEL_PHY_P4,
  177. P5_INTF_SEL_GMAC5,
  178. - P5_INTF_SEL_GMAC5_SGMII,
  179. };
  180. struct mt7530_priv;
  181. @@ -769,6 +768,8 @@ struct mt753x_info {
  182. * registers
  183. * @p6_interface Holding the current port 6 interface
  184. * @p5_intf_sel: Holding the current port 5 interface select
  185. + * @p5_sgmii: Flag for distinguishing if port 5 of the MT7531 switch
  186. + * has got SGMII
  187. * @irq: IRQ number of the switch
  188. * @irq_domain: IRQ domain of the switch irq_chip
  189. * @irq_enable: IRQ enable bits, synced to SYS_INT_EN
  190. @@ -790,6 +791,7 @@ struct mt7530_priv {
  191. phy_interface_t p6_interface;
  192. phy_interface_t p5_interface;
  193. enum p5_interface_select p5_intf_sel;
  194. + bool p5_sgmii;
  195. u8 mirror_rx;
  196. u8 mirror_tx;
  197. struct mt7530_port ports[MT7530_NUM_PORTS];
  198. @@ -799,7 +801,7 @@ struct mt7530_priv {
  199. int irq;
  200. struct irq_domain *irq_domain;
  201. u32 irq_enable;
  202. - int (*create_sgmii)(struct mt7530_priv *priv, bool dual_sgmii);
  203. + int (*create_sgmii)(struct mt7530_priv *priv);
  204. u8 active_cpu_ports;
  205. };