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- From 0eb6bc551371070325b6606cc3bed6734ecad87d Mon Sep 17 00:00:00 2001
- From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= <[email protected]>
- Date: Fri, 1 Mar 2024 12:42:59 +0200
- Subject: [PATCH 39/48] net: dsa: mt7530: do not use SW_PHY_RST to reset MT7531
- switch
- MIME-Version: 1.0
- Content-Type: text/plain; charset=UTF-8
- Content-Transfer-Encoding: 8bit
- According to the document MT7531 Reference Manual for Development Board
- v1.0, the SW_PHY_RST bit on the SYS_CTRL register doesn't exist for
- MT7531. This is likely why forcing link down on all ports is necessary for
- MT7531.
- Therefore, do not set SW_PHY_RST on mt7531_setup().
- Signed-off-by: Arınç ÜNAL <[email protected]>
- Signed-off-by: Paolo Abeni <[email protected]>
- ---
- drivers/net/dsa/mt7530.c | 6 ++----
- 1 file changed, 2 insertions(+), 4 deletions(-)
- --- a/drivers/net/dsa/mt7530.c
- +++ b/drivers/net/dsa/mt7530.c
- @@ -2478,14 +2478,12 @@ mt7531_setup(struct dsa_switch *ds)
- val = mt7530_read(priv, MT7531_TOP_SIG_SR);
- priv->p5_sgmii = !!(val & PAD_DUAL_SGMII_EN);
-
- - /* all MACs must be forced link-down before sw reset */
- + /* Force link down on all ports before internal reset */
- for (i = 0; i < MT7530_NUM_PORTS; i++)
- mt7530_write(priv, MT7530_PMCR_P(i), MT7531_FORCE_LNK);
-
- /* Reset the switch through internal reset */
- - mt7530_write(priv, MT7530_SYS_CTRL,
- - SYS_CTRL_PHY_RST | SYS_CTRL_SW_RST |
- - SYS_CTRL_REG_RST);
- + mt7530_write(priv, MT7530_SYS_CTRL, SYS_CTRL_SW_RST | SYS_CTRL_REG_RST);
-
- if (!priv->p5_sgmii) {
- mt7531_pll_setup(priv);
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