108-02-ARM-dts-qcom-add-MDIO-dedicated-controller-node-for-.patch 5.8 KB

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  1. From 504188183408fac0f61b59f5ed8ea1773fe43669 Mon Sep 17 00:00:00 2001
  2. From: Christian 'Ansuel' Marangi <[email protected]>
  3. Date: Wed, 15 Jun 2022 16:59:30 +0200
  4. Subject: [PATCH 2/2] ARM: dts: qcom: add MDIO dedicated controller node for
  5. ipq806x
  6. Add MDIO dedicated controller attached to gmac0 and fix rb3011 dts to
  7. correctly use the new tag.
  8. Signed-off-by: Christian 'Ansuel' Marangi <[email protected]>
  9. ---
  10. arch/arm/boot/dts/qcom/qcom-ipq8064-rb3011.dts | 134 +++++++++++-----------
  11. arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi | 14 +++
  12. 2 files changed, 81 insertions(+), 67 deletions(-)
  13. --- a/arch/arm/boot/dts/qcom/qcom-ipq8064-rb3011.dts
  14. +++ b/arch/arm/boot/dts/qcom/qcom-ipq8064-rb3011.dts
  15. @@ -25,131 +25,6 @@
  16. device_type = "memory";
  17. };
  18. - mdio0: mdio-0 {
  19. - status = "okay";
  20. - compatible = "virtual,mdio-gpio";
  21. - gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
  22. - <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
  23. - #address-cells = <1>;
  24. - #size-cells = <0>;
  25. -
  26. - pinctrl-0 = <&mdio0_pins>;
  27. - pinctrl-names = "default";
  28. -
  29. - switch0: switch@10 {
  30. - compatible = "qca,qca8337";
  31. -
  32. - dsa,member = <0 0>;
  33. -
  34. - pinctrl-0 = <&sw0_reset_pin>;
  35. - pinctrl-names = "default";
  36. -
  37. - reset-gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>;
  38. - reg = <0x10>;
  39. -
  40. - ports {
  41. - #address-cells = <1>;
  42. - #size-cells = <0>;
  43. -
  44. - switch0cpu: port@0 {
  45. - reg = <0>;
  46. - label = "cpu";
  47. - ethernet = <&gmac0>;
  48. - phy-mode = "rgmii-id";
  49. - fixed-link {
  50. - speed = <1000>;
  51. - full-duplex;
  52. - };
  53. - };
  54. -
  55. - port@1 {
  56. - reg = <1>;
  57. - label = "sw1";
  58. -
  59. - leds {
  60. - #address-cells = <1>;
  61. - #size-cells = <0>;
  62. -
  63. - led@0 {
  64. - reg = <0>;
  65. - color = <LED_COLOR_ID_GREEN>;
  66. - function = LED_FUNCTION_LAN;
  67. - default-state = "keep";
  68. - };
  69. - };
  70. - };
  71. -
  72. - port@2 {
  73. - reg = <2>;
  74. - label = "sw2";
  75. -
  76. - leds {
  77. - #address-cells = <1>;
  78. - #size-cells = <0>;
  79. -
  80. - led@0 {
  81. - reg = <0>;
  82. - color = <LED_COLOR_ID_GREEN>;
  83. - function = LED_FUNCTION_LAN;
  84. - default-state = "keep";
  85. - };
  86. - };
  87. - };
  88. -
  89. - port@3 {
  90. - reg = <3>;
  91. - label = "sw3";
  92. -
  93. - leds {
  94. - #address-cells = <1>;
  95. - #size-cells = <0>;
  96. -
  97. - led@0 {
  98. - reg = <0>;
  99. - color = <LED_COLOR_ID_GREEN>;
  100. - function = LED_FUNCTION_LAN;
  101. - default-state = "keep";
  102. - };
  103. - };
  104. - };
  105. -
  106. - port@4 {
  107. - reg = <4>;
  108. - label = "sw4";
  109. -
  110. - leds {
  111. - #address-cells = <1>;
  112. - #size-cells = <0>;
  113. -
  114. - led@0 {
  115. - reg = <0>;
  116. - color = <LED_COLOR_ID_GREEN>;
  117. - function = LED_FUNCTION_LAN;
  118. - default-state = "keep";
  119. - };
  120. - };
  121. - };
  122. -
  123. - port@5 {
  124. - reg = <5>;
  125. - label = "sw5";
  126. -
  127. - leds {
  128. - #address-cells = <1>;
  129. - #size-cells = <0>;
  130. -
  131. - led@0 {
  132. - reg = <0>;
  133. - color = <LED_COLOR_ID_GREEN>;
  134. - function = LED_FUNCTION_LAN;
  135. - default-state = "keep";
  136. - };
  137. - };
  138. - };
  139. - };
  140. - };
  141. - };
  142. -
  143. mdio1: mdio-1 {
  144. status = "okay";
  145. compatible = "virtual,mdio-gpio";
  146. @@ -337,6 +212,131 @@
  147. status = "okay";
  148. };
  149. +&mdio0 {
  150. + status = "okay";
  151. + compatible = "virtual,mdio-gpio";
  152. + gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
  153. + <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
  154. + #address-cells = <1>;
  155. + #size-cells = <0>;
  156. +
  157. + pinctrl-0 = <&mdio0_pins>;
  158. + pinctrl-names = "default";
  159. +
  160. + switch0: switch@10 {
  161. + compatible = "qca,qca8337";
  162. +
  163. + dsa,member = <0 0>;
  164. +
  165. + pinctrl-0 = <&sw0_reset_pin>;
  166. + pinctrl-names = "default";
  167. +
  168. + reset-gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>;
  169. + reg = <0x10>;
  170. +
  171. + ports {
  172. + #address-cells = <1>;
  173. + #size-cells = <0>;
  174. +
  175. + switch0cpu: port@0 {
  176. + reg = <0>;
  177. + label = "cpu";
  178. + ethernet = <&gmac0>;
  179. + phy-mode = "rgmii-id";
  180. + fixed-link {
  181. + speed = <1000>;
  182. + full-duplex;
  183. + };
  184. + };
  185. +
  186. + port@1 {
  187. + reg = <1>;
  188. + label = "sw1";
  189. +
  190. + leds {
  191. + #address-cells = <1>;
  192. + #size-cells = <0>;
  193. +
  194. + led@0 {
  195. + reg = <0>;
  196. + color = <LED_COLOR_ID_GREEN>;
  197. + function = LED_FUNCTION_LAN;
  198. + default-state = "keep";
  199. + };
  200. + };
  201. + };
  202. +
  203. + port@2 {
  204. + reg = <2>;
  205. + label = "sw2";
  206. +
  207. + leds {
  208. + #address-cells = <1>;
  209. + #size-cells = <0>;
  210. +
  211. + led@0 {
  212. + reg = <0>;
  213. + color = <LED_COLOR_ID_GREEN>;
  214. + function = LED_FUNCTION_LAN;
  215. + default-state = "keep";
  216. + };
  217. + };
  218. + };
  219. +
  220. + port@3 {
  221. + reg = <3>;
  222. + label = "sw3";
  223. +
  224. + leds {
  225. + #address-cells = <1>;
  226. + #size-cells = <0>;
  227. +
  228. + led@0 {
  229. + reg = <0>;
  230. + color = <LED_COLOR_ID_GREEN>;
  231. + function = LED_FUNCTION_LAN;
  232. + default-state = "keep";
  233. + };
  234. + };
  235. + };
  236. +
  237. + port@4 {
  238. + reg = <4>;
  239. + label = "sw4";
  240. +
  241. + leds {
  242. + #address-cells = <1>;
  243. + #size-cells = <0>;
  244. +
  245. + led@0 {
  246. + reg = <0>;
  247. + color = <LED_COLOR_ID_GREEN>;
  248. + function = LED_FUNCTION_LAN;
  249. + default-state = "keep";
  250. + };
  251. + };
  252. + };
  253. +
  254. + port@5 {
  255. + reg = <5>;
  256. + label = "sw5";
  257. +
  258. + leds {
  259. + #address-cells = <1>;
  260. + #size-cells = <0>;
  261. +
  262. + led@0 {
  263. + reg = <0>;
  264. + color = <LED_COLOR_ID_GREEN>;
  265. + function = LED_FUNCTION_LAN;
  266. + default-state = "keep";
  267. + };
  268. + };
  269. + };
  270. + };
  271. + };
  272. +};
  273. +
  274. &gmac0 {
  275. status = "okay";
  276. --- a/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi
  277. +++ b/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi
  278. @@ -1429,6 +1429,20 @@
  279. status = "disabled";
  280. };
  281. + mdio0: mdio@37000000 {
  282. + #address-cells = <1>;
  283. + #size-cells = <0>;
  284. +
  285. + compatible = "qcom,ipq8064-mdio", "syscon";
  286. + reg = <0x37000000 0x200000>;
  287. + resets = <&gcc GMAC_CORE1_RESET>;
  288. + reset-names = "stmmaceth";
  289. + clocks = <&gcc GMAC_CORE1_CLK>;
  290. + clock-names = "stmmaceth";
  291. +
  292. + status = "disabled";
  293. + };
  294. +
  295. gmac0: ethernet@37000000 {
  296. device_type = "network";
  297. compatible = "qcom,ipq806x-gmac", "snps,dwmac";