114-02-ARM-dts-qcom-add-krait-cache-compatible-for-ipq806x-.patch 1.3 KB

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  1. From ef124ad0ff8abfbf4ebe3fe6d7dcef4541dec13a Mon Sep 17 00:00:00 2001
  2. From: Christian Marangi <[email protected]>
  3. Date: Thu, 16 Jun 2022 18:39:21 +0200
  4. Subject: [PATCH] ARM: dts: qcom: add krait-cache compatible for ipq806x dtsi
  5. Add qcom,krait-cache compatible to enable cache devfreq driver for
  6. ipq806x SoC and move the L2 node to the soc node to make the devfreq
  7. driver correctly probe.
  8. Signed-off-by: Christian Marangi <[email protected]>
  9. ---
  10. arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi | 22 +++++++++++-----------
  11. 1 file changed, 11 insertions(+), 11 deletions(-)
  12. --- a/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi
  13. +++ b/arch/arm/boot/dts/qcom/qcom-ipq8064.dtsi
  14. @@ -69,17 +69,6 @@
  15. min-residency-us = <3000>;
  16. };
  17. };
  18. -
  19. - L2: l2-cache {
  20. - compatible = "cache";
  21. - cache-level = <2>;
  22. - cache-unified;
  23. - qcom,saw = <&saw_l2>;
  24. -
  25. - clocks = <&kraitcc 4>;
  26. - clock-names = "l2";
  27. - operating-points-v2 = <&opp_table_l2>;
  28. - };
  29. };
  30. opp_table_l2: opp_table_l2 {
  31. @@ -1392,6 +1381,17 @@
  32. #reset-cells = <1>;
  33. };
  34. + L2: l2-cache {
  35. + compatible = "cache", "qcom,krait-cache";
  36. + cache-level = <2>;
  37. + cache-unified;
  38. + qcom,saw = <&saw_l2>;
  39. +
  40. + clocks = <&kraitcc 4>;
  41. + clock-names = "l2";
  42. + operating-points-v2 = <&opp_table_l2>;
  43. + };
  44. +
  45. lpass@28100000 {
  46. compatible = "qcom,lpass-cpu";
  47. status = "disabled";