mt7623a-unielec-u7623-02.dtsi 6.2 KB

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  1. // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
  2. /*
  3. * Copyright 2018 Kristian Evensen <[email protected]>
  4. */
  5. #include <dt-bindings/input/input.h>
  6. #include "mt7623.dtsi"
  7. #include "mt6323.dtsi"
  8. / {
  9. compatible = "unielec,u7623-02", "mediatek,mt7623";
  10. aliases {
  11. serial0 = &uart2;
  12. ethernet0 = &gmac0;
  13. mmc0 = &mmc0;
  14. led-boot = &led3_green;
  15. led-failsafe = &led3_green;
  16. led-running = &led3_green;
  17. led-upgrade = &led3_green;
  18. };
  19. chosen {
  20. stdout-path = "serial0:115200n8";
  21. };
  22. cpus {
  23. cpu@0 {
  24. proc-supply = <&mt6323_vproc_reg>;
  25. };
  26. cpu@1 {
  27. proc-supply = <&mt6323_vproc_reg>;
  28. };
  29. cpu@2 {
  30. proc-supply = <&mt6323_vproc_reg>;
  31. };
  32. cpu@3 {
  33. proc-supply = <&mt6323_vproc_reg>;
  34. };
  35. };
  36. reg_1p8v: regulator-1p8v {
  37. compatible = "regulator-fixed";
  38. regulator-name = "fixed-1.8V";
  39. regulator-min-microvolt = <1800000>;
  40. regulator-max-microvolt = <1800000>;
  41. regulator-boot-on;
  42. regulator-always-on;
  43. };
  44. reg_3p3v: regulator-3p3v {
  45. compatible = "regulator-fixed";
  46. regulator-name = "fixed-3.3V";
  47. regulator-min-microvolt = <3300000>;
  48. regulator-max-microvolt = <3300000>;
  49. regulator-boot-on;
  50. regulator-always-on;
  51. };
  52. reg_5v: regulator-5v {
  53. compatible = "regulator-fixed";
  54. regulator-name = "fixed-5V";
  55. regulator-min-microvolt = <5000000>;
  56. regulator-max-microvolt = <5000000>;
  57. regulator-boot-on;
  58. regulator-always-on;
  59. };
  60. gpio-keys {
  61. compatible = "gpio-keys";
  62. pinctrl-names = "default";
  63. pinctrl-0 = <&key_pins_a>;
  64. factory {
  65. label = "factory";
  66. linux,code = <KEY_RESTART>;
  67. gpios = <&pio 256 GPIO_ACTIVE_LOW>;
  68. };
  69. };
  70. leds {
  71. compatible = "gpio-leds";
  72. pinctrl-names = "default";
  73. pinctrl-0 = <&led_pins_unielec>;
  74. led3_green: led3 {
  75. label = "u7623-01:green:led3";
  76. gpios = <&pio 14 GPIO_ACTIVE_LOW>;
  77. };
  78. led4 {
  79. label = "u7623-01:green:led4";
  80. gpios = <&pio 15 GPIO_ACTIVE_LOW>;
  81. };
  82. };
  83. };
  84. &crypto {
  85. status = "okay";
  86. };
  87. &eth {
  88. status = "okay";
  89. gmac0: mac@0 {
  90. compatible = "mediatek,eth-mac";
  91. reg = <0>;
  92. phy-mode = "trgmii";
  93. fixed-link {
  94. speed = <1000>;
  95. full-duplex;
  96. pause;
  97. };
  98. };
  99. mdio: mdio-bus {
  100. #address-cells = <1>;
  101. #size-cells = <0>;
  102. mt7530: switch@0 {
  103. compatible = "mediatek,mt7530";
  104. };
  105. };
  106. };
  107. &mt7530 {
  108. compatible = "mediatek,mt7530";
  109. #address-cells = <1>;
  110. #size-cells = <0>;
  111. reg = <0>;
  112. pinctrl-names = "default";
  113. mediatek,mcm;
  114. resets = <&ethsys 2>;
  115. reset-names = "mcm";
  116. core-supply = <&mt6323_vpa_reg>;
  117. io-supply = <&mt6323_vemc3v3_reg>;
  118. dsa,mii-bus = <&mdio>;
  119. ports {
  120. #address-cells = <1>;
  121. #size-cells = <0>;
  122. reg = <0>;
  123. port@0 {
  124. reg = <0>;
  125. label = "lan0";
  126. cpu = <&cpu_port0>;
  127. };
  128. port@1 {
  129. reg = <1>;
  130. label = "lan1";
  131. cpu = <&cpu_port0>;
  132. };
  133. port@2 {
  134. reg = <2>;
  135. label = "lan2";
  136. cpu = <&cpu_port0>;
  137. };
  138. port@3 {
  139. reg = <3>;
  140. label = "lan3";
  141. cpu = <&cpu_port0>;
  142. };
  143. port@4 {
  144. reg = <4>;
  145. label = "wan";
  146. cpu = <&cpu_port0>;
  147. };
  148. cpu_port0: port@6 {
  149. reg = <6>;
  150. ethernet = <&gmac0>;
  151. phy-mode = "trgmii";
  152. fixed-link {
  153. speed = <1000>;
  154. full-duplex;
  155. };
  156. };
  157. };
  158. };
  159. &mmc0 {
  160. pinctrl-names = "default", "state_uhs";
  161. pinctrl-0 = <&mmc0_pins_default>;
  162. pinctrl-1 = <&mmc0_pins_uhs>;
  163. status = "okay";
  164. bus-width = <8>;
  165. max-frequency = <50000000>;
  166. cap-mmc-highspeed;
  167. vmmc-supply = <&reg_3p3v>;
  168. vqmmc-supply = <&reg_1p8v>;
  169. non-removable;
  170. };
  171. &pio {
  172. key_pins_a: keys-alt {
  173. pins-keys {
  174. pinmux = <MT7623_PIN_256_GPIO256_FUNC_GPIO256>,
  175. <MT7623_PIN_257_GPIO257_FUNC_GPIO257>;
  176. input-enable;
  177. };
  178. };
  179. led_pins_unielec: leds-unielec {
  180. pins-leds {
  181. pinmux = <MT7623_PIN_14_GPIO14_FUNC_GPIO14>,
  182. <MT7623_PIN_15_GPIO15_FUNC_GPIO15>;
  183. };
  184. };
  185. mmc0_pins_default: mmc0default {
  186. pins_cmd_dat {
  187. pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
  188. <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
  189. <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
  190. <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
  191. <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
  192. <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
  193. <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
  194. <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
  195. <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
  196. input-enable;
  197. bias-pull-up;
  198. };
  199. pins_clk {
  200. pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
  201. bias-pull-down;
  202. };
  203. pins_rst {
  204. pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
  205. bias-pull-up;
  206. };
  207. };
  208. mmc0_pins_uhs: mmc0 {
  209. pins_cmd_dat {
  210. pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
  211. <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
  212. <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
  213. <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
  214. <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
  215. <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
  216. <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
  217. <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
  218. <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
  219. input-enable;
  220. drive-strength = <MTK_DRIVE_2mA>;
  221. bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
  222. };
  223. pins_clk {
  224. pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
  225. drive-strength = <MTK_DRIVE_2mA>;
  226. bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
  227. };
  228. pins_rst {
  229. pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
  230. bias-pull-up;
  231. };
  232. };
  233. pcie_default: pcie_pin_default {
  234. pins_cmd_dat {
  235. pinmux = <MT7623_PIN_208_AUD_EXT_CK1_FUNC_PCIE0_PERST_N>,
  236. <MT7623_PIN_209_AUD_EXT_CK2_FUNC_PCIE1_PERST_N>;
  237. bias-disable;
  238. };
  239. };
  240. };
  241. &pwm {
  242. pinctrl-names = "default";
  243. pinctrl-0 = <&pwm_pins_a>;
  244. status = "okay";
  245. };
  246. &pwrap {
  247. mt6323 {
  248. mt6323led: led {
  249. compatible = "mediatek,mt6323-led";
  250. #address-cells = <1>;
  251. #size-cells = <0>;
  252. led@0 {
  253. reg = <0>;
  254. label = "led0";
  255. };
  256. };
  257. };
  258. };
  259. &mt6323keys {
  260. mediatek,long-press-mode = <0>;
  261. };
  262. &uart2 {
  263. pinctrl-names = "default";
  264. pinctrl-0 = <&uart2_pins_b>;
  265. status = "okay";
  266. };
  267. &usb1 {
  268. vusb33-supply = <&reg_3p3v>;
  269. vbus-supply = <&reg_3p3v>;
  270. status = "okay";
  271. };
  272. &u3phy1 {
  273. status = "okay";
  274. };
  275. &u3phy2 {
  276. status = "okay";
  277. mediatek,phy-switch = <&hifsys>;
  278. };
  279. &pcie {
  280. pinctrl-names = "default";
  281. pinctrl-0 = <&pcie_default>;
  282. status = "okay";
  283. pcie@0,0 {
  284. status = "okay";
  285. };
  286. pcie@1,0 {
  287. status = "okay";
  288. };
  289. pcie@2,0 {
  290. status = "okay";
  291. };
  292. };
  293. &pcie0_phy {
  294. status = "okay";
  295. };
  296. &pcie1_phy {
  297. status = "okay";
  298. };