mt7986a-zyxel-ex5700-telenor.dts 6.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375
  1. // SPDX-License-Identifier: (GPL-2.0 OR MIT)
  2. /dts-v1/;
  3. #include <dt-bindings/input/input.h>
  4. #include <dt-bindings/leds/common.h>
  5. #include <dt-bindings/gpio/gpio.h>
  6. #include "mt7986a.dtsi"
  7. / {
  8. model = "ZyXEL EX5700 (Telenor)";
  9. compatible = "zyxel,ex5700-telenor", "mediatek,mt7986a";
  10. aliases {
  11. serial0 = &uart0;
  12. ethernet0 = &gmac0;
  13. led-boot = &led_status_green;
  14. led-failsafe = &led_status_green;
  15. led-running = &led_status_green;
  16. led-upgrade = &led_status_amber;
  17. };
  18. chosen {
  19. stdout-path = "serial0:115200n8";
  20. // Stock U-Boot crashes unless /chosen/bootargs exists
  21. bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8";
  22. };
  23. memory {
  24. reg = <0 0x40000000 0 0x40000000>;
  25. };
  26. reg_3p3v: regulator-3p3v {
  27. compatible = "regulator-fixed";
  28. regulator-name = "fixed-3.3V";
  29. regulator-min-microvolt = <3300000>;
  30. regulator-max-microvolt = <3300000>;
  31. regulator-boot-on;
  32. regulator-always-on;
  33. };
  34. reg_5v: regulator-5v {
  35. compatible = "regulator-fixed";
  36. regulator-name = "fixed-5V";
  37. regulator-min-microvolt = <5000000>;
  38. regulator-max-microvolt = <5000000>;
  39. regulator-boot-on;
  40. regulator-always-on;
  41. };
  42. keys {
  43. compatible = "gpio-keys";
  44. poll-interval = <20>;
  45. reset-button {
  46. label = "reset";
  47. gpios = <&pio 9 GPIO_ACTIVE_LOW>;
  48. linux,code = <KEY_RESTART>;
  49. };
  50. wps-button {
  51. label = "wps";
  52. gpios = <&pio 10 GPIO_ACTIVE_LOW>;
  53. linux,code = <KEY_WPS_BUTTON>;
  54. };
  55. };
  56. leds {
  57. compatible = "gpio-leds";
  58. red1 {
  59. label = "red:net";
  60. gpios = <&pio 23 GPIO_ACTIVE_HIGH>;
  61. default-state = "off";
  62. };
  63. green1 {
  64. label = "green:net";
  65. gpios = <&pio 25 GPIO_ACTIVE_HIGH>;
  66. default-state = "off";
  67. };
  68. amber1 {
  69. label = "amber:net";
  70. gpios = <&pio 29 GPIO_ACTIVE_HIGH>;
  71. default-state = "off";
  72. };
  73. white2 {
  74. function = LED_FUNCTION_STATUS;
  75. color = <LED_COLOR_ID_WHITE>;
  76. gpios = <&pio 16 GPIO_ACTIVE_HIGH>;
  77. default-state = "off";
  78. };
  79. red2 {
  80. function = LED_FUNCTION_STATUS;
  81. color = <LED_COLOR_ID_RED>;
  82. gpios = <&pio 17 GPIO_ACTIVE_HIGH>;
  83. default-state = "off";
  84. };
  85. led_status_green: green2 {
  86. function = LED_FUNCTION_STATUS;
  87. color = <LED_COLOR_ID_GREEN>;
  88. gpios = <&pio 31 GPIO_ACTIVE_HIGH>;
  89. default-state = "off";
  90. };
  91. led_status_amber: amber2 {
  92. function = LED_FUNCTION_STATUS;
  93. color = <LED_COLOR_ID_AMBER>;
  94. gpios = <&pio 18 GPIO_ACTIVE_HIGH>;
  95. default-state = "off";
  96. };
  97. };
  98. };
  99. &eth {
  100. status = "okay";
  101. pinctrl-names = "default";
  102. pinctrl-0 = <&eth_pins>;
  103. gmac0: mac@0 {
  104. compatible = "mediatek,eth-mac";
  105. reg = <0>;
  106. phy-mode = "2500base-x";
  107. fixed-link {
  108. speed = <2500>;
  109. full-duplex;
  110. pause;
  111. };
  112. };
  113. mac@1 {
  114. compatible = "mediatek,eth-mac";
  115. reg = <1>;
  116. label = "wan";
  117. phy-mode = "2500base-x";
  118. phy-handle = <&phy6>;
  119. };
  120. mdio: mdio-bus {
  121. #address-cells = <1>;
  122. #size-cells = <0>;
  123. };
  124. };
  125. &mdio {
  126. reset-gpios = <&pio 6 GPIO_ACTIVE_LOW>;
  127. reset-delay-us = <50000>;
  128. reset-post-delay-us = <20000>;
  129. phy5: phy@5 {
  130. compatible = "ethernet-phy-ieee802.3-c45";
  131. reg = <5>;
  132. };
  133. phy6: phy@6 {
  134. compatible = "ethernet-phy-ieee802.3-c45";
  135. reg = <6>;
  136. };
  137. switch: switch@1f {
  138. compatible = "mediatek,mt7531";
  139. reg = <31>;
  140. reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
  141. interrupt-controller;
  142. #interrupt-cells = <1>;
  143. interrupt-parent = <&pio>;
  144. interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
  145. };
  146. };
  147. &switch {
  148. ports {
  149. #address-cells = <1>;
  150. #size-cells = <0>;
  151. port@0 {
  152. reg = <0>;
  153. label = "lan3";
  154. };
  155. port@1 {
  156. reg = <1>;
  157. label = "lan2";
  158. };
  159. port@2 {
  160. reg = <2>;
  161. label = "lan1";
  162. };
  163. port@5 {
  164. reg = <5>;
  165. label = "lan4";
  166. phy-mode = "2500base-x";
  167. phy-handle = <&phy5>;
  168. };
  169. port@6 {
  170. reg = <6>;
  171. ethernet = <&gmac0>;
  172. phy-mode = "2500base-x";
  173. fixed-link {
  174. speed = <2500>;
  175. full-duplex;
  176. pause;
  177. };
  178. };
  179. };
  180. };
  181. &crypto {
  182. status = "okay";
  183. };
  184. &pcie {
  185. pinctrl-names = "default";
  186. pinctrl-0 = <&pcie_pins>;
  187. status = "okay";
  188. pcie@0,0 {
  189. reg = <0x0000 0 0 0 0>;
  190. wifi@0,0 {
  191. compatible = "mediatek,mt76";
  192. reg = <0x0000 0 0 0 0>;
  193. mediatek,mtd-eeprom = <&factory 0xa0000>;
  194. };
  195. };
  196. };
  197. &pcie_phy {
  198. status = "okay";
  199. };
  200. &watchdog {
  201. status = "okay";
  202. };
  203. &wifi {
  204. status = "okay";
  205. pinctrl-names = "default";
  206. pinctrl-0 = <&wf_5g_pins>;
  207. mediatek,mtd-eeprom = <&factory 0x0>;
  208. };
  209. &pio {
  210. eth_pins: eth-pins {
  211. mux {
  212. function = "eth";
  213. groups = "switch_int", "mdc_mdio";
  214. };
  215. };
  216. pcie_pins: pcie-pins {
  217. mux {
  218. function = "pcie";
  219. groups = "pcie_pereset"; // "pcie_clk" and "pcie_wake" is unused?
  220. };
  221. };
  222. spi_flash_pins: spi-flash-pins-33-to-38 {
  223. mux {
  224. function = "spi";
  225. groups = "spi0", "spi0_wp_hold";
  226. };
  227. conf-pu {
  228. pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
  229. drive-strength = <8>;
  230. mediatek,pull-up-adv = <0>; /* bias-disable */
  231. };
  232. conf-pd {
  233. pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
  234. drive-strength = <8>;
  235. mediatek,pull-down-adv = <0>; /* bias-disable */
  236. };
  237. };
  238. wf_5g_pins: wf_5g-pins {
  239. mux {
  240. function = "wifi";
  241. groups = "wf_5g";
  242. };
  243. conf {
  244. pins = "WF1_HB1", "WF1_HB2", "WF1_HB3", "WF1_HB4",
  245. "WF1_HB0", "WF1_HB5", "WF1_HB6", "WF1_HB7",
  246. "WF1_HB8", "WF1_TOP_CLK", "WF1_TOP_DATA";
  247. drive-strength = <4>;
  248. };
  249. };
  250. };
  251. &spi0 {
  252. pinctrl-names = "default";
  253. pinctrl-0 = <&spi_flash_pins>;
  254. cs-gpios = <0>, <0>;
  255. status = "okay";
  256. flash@0 {
  257. compatible = "jedec,spi-nor";
  258. reg = <0>;
  259. spi-max-frequency = <20000000>;
  260. };
  261. flash@1 {
  262. compatible = "spi-nand";
  263. reg = <1>;
  264. mediatek,nmbm;
  265. mediatek,bmt-max-ratio = <1>;
  266. mediatek,bmt-max-reserved-blocks = <64>;
  267. spi-max-frequency = <20000000>;
  268. spi-tx-bus-width = <4>;
  269. spi-rx-bus-width = <4>;
  270. partitions {
  271. compatible = "fixed-partitions";
  272. #address-cells = <1>;
  273. #size-cells = <1>;
  274. partition@0 {
  275. label = "BL2";
  276. reg = <0x000000 0x100000>;
  277. read-only;
  278. };
  279. partition@100000 {
  280. label = "u-boot-env";
  281. reg = <0x100000 0x80000>;
  282. };
  283. factory: partition@180000 {
  284. label = "Factory";
  285. reg = <0x180000 0x200000>;
  286. read-only;
  287. };
  288. partition@380000 {
  289. label = "FIP";
  290. reg = <0x380000 0x200000>;
  291. read-only;
  292. };
  293. partition@580000 {
  294. label = "ubi";
  295. reg = <0x580000 0x1da80000>;
  296. };
  297. };
  298. };
  299. };
  300. &ssusb {
  301. vusb33-supply = <&reg_3p3v>;
  302. vbus-supply = <&reg_5v>;
  303. status = "okay";
  304. };
  305. &trng {
  306. status = "okay";
  307. };
  308. &uart0 {
  309. status = "okay";
  310. };
  311. &usb_phy {
  312. status = "okay";
  313. };