1018-soc-sifive-ccache-Add-StarFive-JH71x0-support.patch 2.4 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677
  1. From cde57aebfd86b3b062ce0bcf71395d735d05b2f6 Mon Sep 17 00:00:00 2001
  2. From: Emil Renner Berthing <[email protected]>
  3. Date: Wed, 6 Apr 2022 00:38:05 +0200
  4. Subject: [PATCH 1018/1024] soc: sifive: ccache: Add StarFive JH71x0 support
  5. This adds support for the StarFive JH7100 and JH7110 SoCs which also
  6. feature this SiFive cache controller.
  7. Unfortunately the interrupt for uncorrected data is broken on the JH7100
  8. and fires continuously, so add a quirk to not register a handler for it.
  9. Signed-off-by: Emil Renner Berthing <[email protected]>
  10. ---
  11. arch/riscv/Kconfig.socs | 1 +
  12. drivers/soc/sifive/Kconfig | 2 +-
  13. drivers/soc/sifive/sifive_ccache.c | 12 +++++++++++-
  14. 3 files changed, 13 insertions(+), 2 deletions(-)
  15. --- a/arch/riscv/Kconfig.socs
  16. +++ b/arch/riscv/Kconfig.socs
  17. @@ -28,6 +28,7 @@ config SOC_STARFIVE
  18. bool "StarFive SoCs"
  19. select PINCTRL
  20. select RESET_CONTROLLER
  21. + select SIFIVE_CCACHE
  22. select SIFIVE_PLIC
  23. select ARM_AMBA
  24. help
  25. --- a/drivers/soc/sifive/Kconfig
  26. +++ b/drivers/soc/sifive/Kconfig
  27. @@ -1,6 +1,6 @@
  28. # SPDX-License-Identifier: GPL-2.0
  29. -if SOC_SIFIVE
  30. +if SOC_SIFIVE || SOC_STARFIVE
  31. config SIFIVE_CCACHE
  32. bool "Sifive Composable Cache controller"
  33. --- a/drivers/soc/sifive/sifive_ccache.c
  34. +++ b/drivers/soc/sifive/sifive_ccache.c
  35. @@ -106,6 +106,8 @@ static void ccache_config_read(void)
  36. static const struct of_device_id sifive_ccache_ids[] = {
  37. { .compatible = "sifive,fu540-c000-ccache" },
  38. { .compatible = "sifive,fu740-c000-ccache" },
  39. + { .compatible = "starfive,jh7100-ccache", .data = (void *)BIT(DATA_UNCORR) },
  40. + { .compatible = "starfive,jh7110-ccache" },
  41. { .compatible = "sifive,ccache0" },
  42. { /* end of table */ }
  43. };
  44. @@ -210,11 +212,15 @@ static int __init sifive_ccache_init(voi
  45. struct device_node *np;
  46. struct resource res;
  47. int i, rc, intr_num;
  48. + const struct of_device_id *match;
  49. + unsigned long broken_irqs;
  50. - np = of_find_matching_node(NULL, sifive_ccache_ids);
  51. + np = of_find_matching_node_and_match(NULL, sifive_ccache_ids, &match);
  52. if (!np)
  53. return -ENODEV;
  54. + broken_irqs = (uintptr_t)match->data;
  55. +
  56. if (of_address_to_resource(np, 0, &res)) {
  57. rc = -ENODEV;
  58. goto err_node_put;
  59. @@ -240,6 +246,10 @@ static int __init sifive_ccache_init(voi
  60. for (i = 0; i < intr_num; i++) {
  61. g_irq[i] = irq_of_parse_and_map(np, i);
  62. +
  63. + if (broken_irqs & BIT(i))
  64. + continue;
  65. +
  66. rc = request_irq(g_irq[i], ccache_int_handler, 0, "ccache_ecc",
  67. NULL);
  68. if (rc) {