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- From fccbb0c52438762999ea16c85d4ebf4cc7e2deff Mon Sep 17 00:00:00 2001
- From: Hal Feng <[email protected]>
- Date: Sat, 1 Apr 2023 19:19:30 +0800
- Subject: [PATCH 020/122] dt-bindings: riscv: Add SiFive S7 compatible
- Add a new compatible string in cpu.yaml for SiFive S7 CPU
- core which is used on SiFive U74-MC core complex etc.
- Reviewed-by: Conor Dooley <[email protected]>
- Acked-by: Krzysztof Kozlowski <[email protected]>
- Reviewed-by: Emil Renner Berthing <[email protected]>
- Signed-off-by: Hal Feng <[email protected]>
- Signed-off-by: Conor Dooley <[email protected]>
- ---
- Documentation/devicetree/bindings/riscv/cpus.yaml | 1 +
- 1 file changed, 1 insertion(+)
- --- a/Documentation/devicetree/bindings/riscv/cpus.yaml
- +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml
- @@ -33,6 +33,7 @@ properties:
- - sifive,e5
- - sifive,e7
- - sifive,e71
- + - sifive,s7
- - sifive,u74-mc
- - sifive,u54
- - sifive,u74
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