0037-dt-bindings-soc-starfive-Add-StarFive-syscon-module.patch 2.8 KB

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  1. From 27d38dda7527414eb84ef471425e96c9d2566b38 Mon Sep 17 00:00:00 2001
  2. From: William Qiu <[email protected]>
  3. Date: Thu, 6 Apr 2023 15:46:13 +0800
  4. Subject: [PATCH 037/122] dt-bindings: soc: starfive: Add StarFive syscon
  5. module
  6. Add documentation to describe StarFive System Controller Registers.
  7. Signed-off-by: William Qiu <[email protected]>
  8. ---
  9. .../soc/starfive/starfive,jh7110-syscon.yaml | 58 +++++++++++++++++++
  10. MAINTAINERS | 6 ++
  11. 2 files changed, 64 insertions(+)
  12. create mode 100644 Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml
  13. --- /dev/null
  14. +++ b/Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml
  15. @@ -0,0 +1,58 @@
  16. +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
  17. +%YAML 1.2
  18. +---
  19. +$id: http://devicetree.org/schemas/soc/starfive/starfive,jh7110-syscon.yaml#
  20. +$schema: http://devicetree.org/meta-schemas/core.yaml#
  21. +
  22. +title: StarFive JH7110 SoC system controller
  23. +
  24. +maintainers:
  25. + - William Qiu <[email protected]>
  26. +
  27. +description: |
  28. + The StarFive JH7110 SoC system controller provides register information such
  29. + as offset, mask and shift to configure related modules such as MMC and PCIe.
  30. +
  31. +properties:
  32. + compatible:
  33. + oneOf:
  34. + - items:
  35. + - enum:
  36. + - starfive,jh7110-aon-syscon
  37. + - starfive,jh7110-sys-syscon
  38. + - const: syscon
  39. + - const: simple-mfd
  40. + - items:
  41. + - const: starfive,jh7110-stg-syscon
  42. + - const: syscon
  43. +
  44. + reg:
  45. + maxItems: 1
  46. +
  47. + clock-controller:
  48. + $ref: /schemas/clock/starfive,jh7110-pll.yaml#
  49. + type: object
  50. +
  51. + power-controller:
  52. + $ref: /schemas/power/starfive,jh7110-pmu.yaml#
  53. + type: object
  54. +
  55. +required:
  56. + - compatible
  57. + - reg
  58. +
  59. +additionalProperties: false
  60. +
  61. +examples:
  62. + - |
  63. + syscon@10240000 {
  64. + compatible = "starfive,jh7110-stg-syscon", "syscon";
  65. + reg = <0x10240000 0x1000>;
  66. + };
  67. +
  68. + syscon@13030000 {
  69. + compatible = "starfive,jh7110-sys-syscon", "syscon", "simple-mfd";
  70. + reg = <0x13030000 0x1000>;
  71. + };
  72. +
  73. +...
  74. --- a/MAINTAINERS
  75. +++ b/MAINTAINERS
  76. @@ -19656,6 +19656,11 @@ S: Supported
  77. F: Documentation/devicetree/bindings/clock/starfive,jh7110-pll.yaml
  78. F: drivers/clk/starfive/clk-starfive-jh7110-pll.*
  79. +STARFIVE JH7110 SYSCON
  80. +M: William Qiu <[email protected]>
  81. +S: Supported
  82. +F: Documentation/devicetree/bindings/soc/starfive/starfive,jh7110-syscon.yaml
  83. +
  84. STARFIVE JH71X0 CLOCK DRIVERS
  85. M: Emil Renner Berthing <[email protected]>
  86. M: Hal Feng <[email protected]>
  87. @@ -19686,6 +19691,7 @@ STARFIVE SOC DRIVER
  88. M: Conor Dooley <[email protected]>
  89. S: Maintained
  90. T: git https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/
  91. +F: Documentation/devicetree/bindings/soc/starfive/
  92. F: drivers/soc/starfive/
  93. F: include/soc/starfive/