410-add-linksys-e8450.patch 13 KB

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  1. --- /dev/null
  2. +++ b/configs/mt7622_linksys_e8450_defconfig
  3. @@ -0,0 +1,141 @@
  4. +CONFIG_ARM=y
  5. +CONFIG_POSITION_INDEPENDENT=y
  6. +CONFIG_ARCH_MEDIATEK=y
  7. +CONFIG_TARGET_MT7622=y
  8. +CONFIG_SYS_TEXT_BASE=0x41e00000
  9. +CONFIG_SYS_MALLOC_F_LEN=0x4000
  10. +CONFIG_SYS_LOAD_ADDR=0x40080000
  11. +CONFIG_USE_DEFAULT_ENV_FILE=y
  12. +CONFIG_BOARD_LATE_INIT=y
  13. +CONFIG_BOOTP_SEND_HOSTNAME=y
  14. +CONFIG_DEFAULT_ENV_FILE="linksys_e8450_env"
  15. +CONFIG_NR_DRAM_BANKS=1
  16. +CONFIG_DEBUG_UART_BASE=0x11002000
  17. +CONFIG_DEBUG_UART_CLOCK=25000000
  18. +CONFIG_DEFAULT_DEVICE_TREE="mt7622-linksys-e8450-ubi"
  19. +CONFIG_DEBUG_UART=y
  20. +CONFIG_MTDPARTS_DEFAULT="mtdparts=spi-nand0:512k(bl2),1280k(fip),1024k(factory),256k(reserved),-(ubi)"
  21. +CONFIG_SMBIOS_PRODUCT_NAME=""
  22. +CONFIG_AUTOBOOT_KEYED=y
  23. +CONFIG_BOOTDELAY=30
  24. +CONFIG_AUTOBOOT_MENU_SHOW=y
  25. +CONFIG_CFB_CONSOLE_ANSI=y
  26. +CONFIG_BUTTON=y
  27. +CONFIG_BUTTON_GPIO=y
  28. +CONFIG_GPIO_HOG=y
  29. +CONFIG_CMD_ENV_FLAGS=y
  30. +CONFIG_FIT=y
  31. +CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
  32. +CONFIG_LED=y
  33. +CONFIG_LED_BLINK=y
  34. +CONFIG_LED_GPIO=y
  35. +CONFIG_LOGLEVEL=7
  36. +CONFIG_LOG=y
  37. +CONFIG_DEFAULT_FDT_FILE="mt7622-linksys-e8450"
  38. +CONFIG_SYS_PROMPT="MT7622> "
  39. +CONFIG_CMD_BOOTMENU=y
  40. +CONFIG_CMD_BOOTP=y
  41. +CONFIG_CMD_BUTTON=y
  42. +CONFIG_CMD_CDP=y
  43. +CONFIG_CMD_DHCP=y
  44. +CONFIG_CMD_DNS=y
  45. +CONFIG_CMD_ECHO=y
  46. +CONFIG_CMD_ENV_READMEM=y
  47. +CONFIG_CMD_ERASEENV=y
  48. +CONFIG_CMD_EXT4=y
  49. +CONFIG_CMD_FAT=y
  50. +CONFIG_CMD_FS_GENERIC=y
  51. +CONFIG_CMD_FS_UUID=y
  52. +CONFIG_CMD_GPIO=y
  53. +CONFIG_CMD_GPT=y
  54. +CONFIG_CMD_HASH=y
  55. +CONFIG_CMD_ITEST=y
  56. +CONFIG_CMD_LED=y
  57. +CONFIG_CMD_LICENSE=y
  58. +CONFIG_CMD_LINK_LOCAL=y
  59. +# CONFIG_CMD_MBR is not set
  60. +CONFIG_CMD_MTD=y
  61. +CONFIG_CMD_MTDPARTS=y
  62. +CONFIG_CMD_PCI=y
  63. +CONFIG_CMD_SF_TEST=y
  64. +CONFIG_CMD_PING=y
  65. +CONFIG_CMD_PXE=y
  66. +CONFIG_CMD_SMC=y
  67. +CONFIG_CMD_TFTPBOOT=y
  68. +CONFIG_CMD_TFTPSRV=y
  69. +CONFIG_CMD_UBI=y
  70. +CONFIG_CMD_UBI_RENAME=y
  71. +CONFIG_CMD_UBIFS=y
  72. +CONFIG_CMD_ASKENV=y
  73. +CONFIG_CMD_PART=y
  74. +CONFIG_CMD_PSTORE=y
  75. +CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
  76. +CONFIG_CMD_RARP=y
  77. +CONFIG_CMD_SETEXPR=y
  78. +CONFIG_CMD_SLEEP=y
  79. +CONFIG_CMD_SNTP=y
  80. +CONFIG_CMD_SOURCE=y
  81. +CONFIG_CMD_USB=y
  82. +CONFIG_CMD_UUID=y
  83. +CONFIG_DISPLAY_CPUINFO=y
  84. +CONFIG_DM_REGULATOR=y
  85. +CONFIG_DM_REGULATOR_FIXED=y
  86. +CONFIG_DM_REGULATOR_GPIO=y
  87. +CONFIG_DM_USB=y
  88. +CONFIG_HUSH_PARSER=y
  89. +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
  90. +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
  91. +CONFIG_ENV_IS_IN_UBI=y
  92. +CONFIG_ENV_UBI_PART="ubi"
  93. +CONFIG_ENV_UBI_VOLUME="ubootenv"
  94. +CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
  95. +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
  96. +CONFIG_VERSION_VARIABLE=y
  97. +CONFIG_PARTITION_UUIDS=y
  98. +CONFIG_NETCONSOLE=y
  99. +CONFIG_REGMAP=y
  100. +CONFIG_SYSCON=y
  101. +CONFIG_CLK=y
  102. +CONFIG_DM_MTD=y
  103. +CONFIG_DM_GPIO=y
  104. +CONFIG_PHY=y
  105. +CONFIG_PHY_MTK_TPHY=y
  106. +CONFIG_PHY_FIXED=y
  107. +CONFIG_DM_ETH=y
  108. +CONFIG_MEDIATEK_ETH=y
  109. +CONFIG_PCI=y
  110. +CONFIG_MTD=y
  111. +CONFIG_MTD_UBI_FASTMAP=y
  112. +CONFIG_DM_PCI=y
  113. +CONFIG_PCIE_MEDIATEK=y
  114. +CONFIG_PINCTRL=y
  115. +CONFIG_PINCONF=y
  116. +CONFIG_PINCTRL_MT7622=y
  117. +CONFIG_POWER_DOMAIN=y
  118. +CONFIG_PRE_CONSOLE_BUFFER=y
  119. +CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
  120. +CONFIG_MTK_POWER_DOMAIN=y
  121. +CONFIG_RAM=y
  122. +CONFIG_DM_SERIAL=y
  123. +CONFIG_MTK_SERIAL=y
  124. +CONFIG_SPI=y
  125. +CONFIG_DM_SPI=y
  126. +CONFIG_MTK_SPI_NAND=y
  127. +CONFIG_MTK_SPI_NAND_MTD=y
  128. +CONFIG_SYSRESET_WATCHDOG=y
  129. +CONFIG_SYS_HAS_NONCACHED_MEMORY=y
  130. +CONFIG_WDT_MTK=y
  131. +CONFIG_LZO=y
  132. +CONFIG_ZSTD=y
  133. +CONFIG_HEXDUMP=y
  134. +CONFIG_RANDOM_UUID=y
  135. +CONFIG_REGEX=y
  136. +CONFIG_USE_IPADDR=y
  137. +CONFIG_IPADDR="192.168.1.1"
  138. +CONFIG_USE_SERVERIP=y
  139. +CONFIG_SERVERIP="192.168.1.254"
  140. +CONFIG_USB=y
  141. +CONFIG_USB_HOST=y
  142. +CONFIG_USB_XHCI_HCD=y
  143. +CONFIG_USB_XHCI_MTK=y
  144. +CONFIG_USB_STORAGE=y
  145. --- /dev/null
  146. +++ b/arch/arm/dts/mt7622-linksys-e8450-ubi.dts
  147. @@ -0,0 +1,197 @@
  148. +// SPDX-License-Identifier: GPL-2.0
  149. +/*
  150. + * Copyright (c) 2019 MediaTek Inc.
  151. + * Author: Sam Shih <[email protected]>
  152. + */
  153. +
  154. +/dts-v1/;
  155. +#include <dt-bindings/input/linux-event-codes.h>
  156. +#include "mt7622.dtsi"
  157. +#include "mt7622-u-boot.dtsi"
  158. +
  159. +/ {
  160. + #address-cells = <1>;
  161. + #size-cells = <1>;
  162. + model = "mt7622-linksys-e8450-ubi";
  163. + compatible = "mediatek,mt7622", "linksys,e8450-ubi";
  164. + chosen {
  165. + stdout-path = &uart0;
  166. + tick-timer = &timer0;
  167. + };
  168. +
  169. + aliases {
  170. + spi0 = &snand;
  171. + };
  172. +
  173. + gpio-keys {
  174. + compatible = "gpio-keys";
  175. +
  176. + factory {
  177. + label = "reset";
  178. + gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
  179. + linux,code = <KEY_RESTART>;
  180. + };
  181. +
  182. + wps {
  183. + label = "wps";
  184. + gpios = <&gpio 102 GPIO_ACTIVE_LOW>;
  185. + linux,code = <KEY_WPS_BUTTON>;
  186. + };
  187. + };
  188. +
  189. + gpio-leds {
  190. + compatible = "gpio-leds";
  191. +
  192. + led_power: power_blue {
  193. + label = "power:blue";
  194. + gpios = <&gpio 95 GPIO_ACTIVE_LOW>;
  195. + default-state = "on";
  196. + };
  197. +
  198. + power_orange {
  199. + label = "power:orange";
  200. + gpios = <&gpio 96 GPIO_ACTIVE_LOW>;
  201. + default-state = "off";
  202. + };
  203. +
  204. + inet_blue {
  205. + label = "inet:blue";
  206. + gpios = <&gpio 97 GPIO_ACTIVE_LOW>;
  207. + default-state = "off";
  208. + };
  209. +
  210. + inet_orange {
  211. + label = "inet:orange";
  212. + gpios = <&gpio 98 GPIO_ACTIVE_LOW>;
  213. + default-state = "off";
  214. + };
  215. + };
  216. +
  217. + memory@40000000 {
  218. + device_type = "memory";
  219. + reg = <0x40000000 0x20000000>;
  220. + };
  221. +
  222. + reg_1p8v: regulator-1p8v {
  223. + compatible = "regulator-fixed";
  224. + regulator-name = "fixed-1.8V";
  225. + regulator-min-microvolt = <1800000>;
  226. + regulator-max-microvolt = <1800000>;
  227. + regulator-boot-on;
  228. + regulator-always-on;
  229. + };
  230. +
  231. + reg_3p3v: regulator-3p3v {
  232. + compatible = "regulator-fixed";
  233. + regulator-name = "fixed-3.3V";
  234. + regulator-min-microvolt = <3300000>;
  235. + regulator-max-microvolt = <3300000>;
  236. + regulator-boot-on;
  237. + regulator-always-on;
  238. + };
  239. +
  240. + reg_5v: regulator-5v {
  241. + compatible = "regulator-fixed";
  242. + regulator-name = "fixed-5V";
  243. + regulator-min-microvolt = <5000000>;
  244. + regulator-max-microvolt = <5000000>;
  245. + regulator-boot-on;
  246. + regulator-always-on;
  247. + };
  248. +};
  249. +
  250. +&pcie {
  251. + pinctrl-names = "default";
  252. + pinctrl-0 = <&pcie0_pins>, <&pcie1_pins>;
  253. + status = "okay";
  254. +
  255. + pcie@0,0 {
  256. + status = "okay";
  257. + };
  258. +
  259. + pcie@1,0 {
  260. + status = "okay";
  261. + };
  262. +};
  263. +
  264. +&pinctrl {
  265. + pcie0_pins: pcie0-pins {
  266. + mux {
  267. + function = "pcie";
  268. + groups = "pcie0_pad_perst",
  269. + "pcie0_1_waken",
  270. + "pcie0_1_clkreq";
  271. + };
  272. + };
  273. +
  274. + pcie1_pins: pcie1-pins {
  275. + mux {
  276. + function = "pcie";
  277. + groups = "pcie1_pad_perst",
  278. + "pcie1_0_waken",
  279. + "pcie1_0_clkreq";
  280. + };
  281. + };
  282. +
  283. + snfi_pins: snfi-pins {
  284. + mux {
  285. + function = "flash";
  286. + groups = "snfi";
  287. + };
  288. + };
  289. +
  290. + uart0_pins: uart0 {
  291. + mux {
  292. + function = "uart";
  293. + groups = "uart0_0_tx_rx" ;
  294. + };
  295. + };
  296. +
  297. + watchdog_pins: watchdog-default {
  298. + mux {
  299. + function = "watchdog";
  300. + groups = "watchdog";
  301. + };
  302. + };
  303. +};
  304. +
  305. +&snand {
  306. + pinctrl-names = "default";
  307. + pinctrl-0 = <&snfi_pins>;
  308. + status = "okay";
  309. + quad-spi;
  310. +};
  311. +
  312. +&uart0 {
  313. + mediatek,force-highspeed;
  314. + status = "okay";
  315. +};
  316. +
  317. +&watchdog {
  318. + pinctrl-names = "default";
  319. + pinctrl-0 = <&watchdog_pins>;
  320. + status = "okay";
  321. +};
  322. +
  323. +&eth {
  324. + status = "okay";
  325. + mediatek,gmac-id = <0>;
  326. + phy-mode = "sgmii";
  327. + mediatek,switch = "mt7531";
  328. + reset-gpios = <&gpio 54 GPIO_ACTIVE_HIGH>;
  329. +
  330. + fixed-link {
  331. + speed = <1000>;
  332. + full-duplex;
  333. + };
  334. +};
  335. +
  336. +&ssusb {
  337. + vusb33-supply = <&reg_3p3v>;
  338. + vbus-supply = <&reg_5v>;
  339. + status = "okay";
  340. +};
  341. +
  342. +&u3phy {
  343. + status = "okay";
  344. +};
  345. --- a/arch/arm/dts/Makefile
  346. +++ b/arch/arm/dts/Makefile
  347. @@ -1285,6 +1285,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
  348. mt7622-rfb.dtb \
  349. mt7623a-unielec-u7623-02-emmc.dtb \
  350. mt7622-bananapi-bpi-r64.dtb \
  351. + mt7622-linksys-e8450-ubi.dtb \
  352. mt7623n-bananapi-bpi-r2.dtb \
  353. mt7629-rfb.dtb \
  354. mt7981-rfb.dtb \
  355. --- /dev/null
  356. +++ b/linksys_e8450_env
  357. @@ -0,0 +1,57 @@
  358. +ethaddr_factory=mtd read spi-nand0 0x40080000 0x220000 0x20000 && env readmem -b ethaddr 0x4009fff4 0x6 ; setenv ethaddr_factory
  359. +ipaddr=192.168.1.1
  360. +serverip=192.168.1.254
  361. +loadaddr=0x48000000
  362. +bootcmd=if pstore check ; then run boot_recovery ; else run boot_ubi ; fi
  363. +bootconf=config-1
  364. +bootdelay=0
  365. +bootfile=openwrt-mediatek-mt7622-linksys_e8450-ubi-initramfs-recovery.itb
  366. +bootfile_bl2=openwrt-mediatek-mt7622-linksys_e8450-ubi-preloader.bin
  367. +bootfile_fip=openwrt-mediatek-mt7622-linksys_e8450-ubi-bl31-uboot.fip
  368. +bootfile_upg=openwrt-mediatek-mt7622-linksys_e8450-ubi-squashfs-sysupgrade.itb
  369. +bootled_pwr=power:blue
  370. +bootled_rec=inet:orange on
  371. +bootmenu_confirm_return=askenv - Press ENTER to return to menu ; bootmenu 60
  372. +bootmenu_default=0
  373. +bootmenu_delay=0
  374. +bootmenu_title= ( ( ( OpenWrt ) ) )
  375. +bootmenu_0=Initialize environment.=run _firstboot
  376. +bootmenu_0d=Run default boot command.=run boot_default
  377. +bootmenu_1=Boot system via TFTP.=run boot_tftp ; run bootmenu_confirm_return
  378. +bootmenu_2=Boot production system from flash.=run boot_production ; run bootmenu_confirm_return
  379. +bootmenu_3=Boot recovery system from flash.=run boot_recovery ; run bootmenu_confirm_return
  380. +bootmenu_4=Load production system via TFTP then write to flash.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_production ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return
  381. +bootmenu_5=Load recovery system via TFTP then write to flash.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_recovery ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return
  382. +bootmenu_6=Load BL31+U-Boot FIP via TFTP then write to flash.=run boot_tftp_write_fip ; run bootmenu_confirm_return
  383. +bootmenu_7=Load BL2 preloader via TFTP then write to flash.=run boot_tftp_write_bl2 ; run bootmenu_confirm_return
  384. +bootmenu_8=Reboot.=reset
  385. +bootmenu_9=Reset all settings to factory defaults.=run reset_factory ; reset
  386. +boot_first=if button reset ; then led $bootled_rec on ; run boot_tftp_recovery ; setenv flag_recover 1 ; run boot_default ; fi ; bootmenu
  387. +boot_default=if env exists flag_recover ; then else run bootcmd ; fi ; run boot_recovery ; setenv replacevol 1 ; run boot_tftp_forever
  388. +boot_production=led $bootled_pwr on ; run ubi_read_production && bootm $loadaddr#$bootconf ; led $bootled_pwr off
  389. +boot_recovery=led $bootled_rec on ; run ubi_read_recovery ; bootm $loadaddr#$bootconf ; ubi remove recovery ; led $bootled_rec off
  390. +boot_serial_write_bl2=loadx $loadaddr 115200 && run boot_write_bl2
  391. +boot_serial_write_fip=loadx $loadaddr 115200 && run boot_write_fip
  392. +boot_tftp=tftpboot $loadaddr $bootfile && bootm $loadaddr#$bootconf
  393. +boot_tftp_forever=led $bootled_rec on ; while true ; do run boot_tftp_recovery ; sleep 1 ; done
  394. +boot_tftp_production=tftpboot $loadaddr $bootfile_upg && iminfo $loadaddr && ubi part ubi && run ubi_write_production ubi_prepare_rootfs ; if env exists noboot ; then else bootm $loadaddr#$bootconf ; fi
  395. +boot_tftp_recovery=tftpboot $loadaddr $bootfile && iminfo $loadaddr && ubi part ubi && run ubi_write_recovery ; if env exists noboot ; then else bootm $loadaddr#$bootconf ; fi
  396. +boot_tftp_write_bl2=tftpboot $loadaddr $bootfile_bl2 && run boot_write_bl2
  397. +boot_tftp_write_fip=tftpboot $loadaddr $bootfile_fip && run boot_write_fip
  398. +boot_ubi=ubi part ubi && run boot_production ; run boot_recovery
  399. +boot_write_bl2=mtd erase bl2 && mtd write spi-nand0 $loadaddr 0x0 0x20000 && mtd write spi-nand0 $loadaddr 0x20000 0x20000 && mtd write spi-nand0 $loadaddr 0x40000 0x20000 && mtd write spi-nand0 $loadaddr 0x60000 0x20000
  400. +boot_write_fip=mtd erase fip && mtd write fip $loadaddr
  401. +check_ubi=ubi part ubi || run ubi_format
  402. +reset_factory=mw $loadaddr 0x0 0x100000 ; ubi part ubi ; ubi write $loadaddr ubootenv 0x100000 ; ubi write $loadaddr ubootenv2 0x100000 ; ubi remove rootfs_data
  403. +ubi_format=ubi detach ; mtd erase ubi && ubi part ubi ; reset
  404. +ubi_prepare_rootfs=if ubi check rootfs_data ; then else if env exists rootfs_data_max ; then ubi create rootfs_data $rootfs_data_max dynamic || ubi create rootfs_data - dynamic ; else ubi create rootfs_data - dynamic ; fi ; fi
  405. +ubi_read_production=ubi read $loadaddr fit && iminfo $loadaddr && run ubi_prepare_rootfs
  406. +ubi_read_recovery=ubi check recovery && ubi read $loadaddr recovery
  407. +ubi_remove_rootfs=ubi check rootfs_data && ubi remove rootfs_data
  408. +ubi_write_production=ubi check fit && env exists replacevol && ubi remove fit ; if ubi check fit ; then else run ubi_remove_rootfs ; ubi create fit $filesize dynamic && ubi write $loadaddr fit $filesize ; fi
  409. +ubi_write_recovery=ubi check recovery && env exists replacevol && ubi remove recovery ; if ubi check recovery ; then else run ubi_remove_rootfs ; ubi create recovery $filesize dynamic && ubi write $loadaddr recovery $filesize ; fi
  410. +_create_env=ubi create ubootenv 0x100000 dynamic ; ubi create ubootenv2 0x100000 dynamic
  411. +_init_env=setenv _init_env ; if ubi check ubootenv && ubi check ubootenv2 ; then else run _create_env ; fi ; setenv _create_env ; saveenv || run ubi_format ; saveenv || run ubi_format
  412. +_firstboot=setenv _firstboot ; run _switch_to_menu ; run ethaddr_factory ; run check_ubi ; run _init_env ; run boot_first
  413. +_switch_to_menu=setenv _switch_to_menu ; setenv bootdelay 3 ; setenv bootmenu_delay 3 ; setenv bootmenu_0 $bootmenu_0d ; setenv bootmenu_0d ; run _bootmenu_update_title
  414. +_bootmenu_update_title=setenv _bootmenu_update_title ; setenv bootmenu_title "$bootmenu_title $ver"