qcom-ipq4018-whw01.dts 5.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  2. #include "qcom-ipq4019.dtsi"
  3. #include <dt-bindings/leds/common.h>
  4. #include <dt-bindings/gpio/gpio.h>
  5. #include <dt-bindings/input/input.h>
  6. / {
  7. model = "Linksys WHW01";
  8. compatible = "linksys,whw01";
  9. aliases {
  10. serial0 = &blsp1_uart1;
  11. led-boot = &led_system_blue;
  12. led-running = &led_system_blue;
  13. };
  14. chosen {
  15. stdout-path = "serial0:115200n8";
  16. bootargs-append = " root=/dev/ubiblock0_0";
  17. };
  18. soc {
  19. keys {
  20. compatible = "gpio-keys";
  21. reset {
  22. label = "reset";
  23. gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
  24. linux,code = <KEY_RESTART>;
  25. };
  26. };
  27. ess_tcsr@1953000 {
  28. status = "okay";
  29. };
  30. };
  31. };
  32. &blsp_dma {
  33. status = "okay";
  34. };
  35. &blsp1_i2c3 {
  36. status = "okay";
  37. pinctrl-0 = <&i2c_0_pins>;
  38. pinctrl-1 = <&i2c_0_pins>;
  39. pinctrl-names = "i2c_active", "i2c_sleep";
  40. leds@62 {
  41. compatible = "nxp,pca9633";
  42. #address-cells = <1>;
  43. #size-cells = <0>;
  44. reg = <0x62>;
  45. /* RGB? */
  46. led@0 {
  47. reg = <0>;
  48. color = <LED_COLOR_ID_RED>;
  49. function = LED_FUNCTION_POWER;
  50. };
  51. led@1 {
  52. reg = <1>;
  53. color = <LED_COLOR_ID_GREEN>;
  54. function = LED_FUNCTION_POWER;
  55. };
  56. led_system_blue: led@2 {
  57. reg = <2>;
  58. color = <LED_COLOR_ID_BLUE>;
  59. function = LED_FUNCTION_POWER;
  60. linux,default-trigger = "default-on";
  61. };
  62. };
  63. };
  64. &blsp1_spi1 {
  65. status = "okay";
  66. pinctrl-0 = <&spi_0_pins>;
  67. pinctrl-names = "default";
  68. cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 4 GPIO_ACTIVE_HIGH>;
  69. nor@0 {
  70. reg = <0>;
  71. compatible = "jedec,spi-nor";
  72. spi-max-frequency = <24000000>;
  73. partitions {
  74. compatible = "fixed-partitions";
  75. #address-cells = <1>;
  76. #size-cells = <1>;
  77. partition@0 {
  78. label = "0:SBL1";
  79. reg = <0x0 0x40000>;
  80. read-only;
  81. };
  82. partition@40000 {
  83. label = "0:MIBIB";
  84. reg = <0x40000 0x20000>;
  85. read-only;
  86. };
  87. partition@60000 {
  88. label = "0:QSEE";
  89. reg = <0x60000 0x60000>;
  90. read-only;
  91. };
  92. partition@c0000 {
  93. label = "0:CDT";
  94. reg = <0xc0000 0x10000>;
  95. read-only;
  96. };
  97. partition@d0000 {
  98. label = "APPSBL";
  99. reg = <0xd0000 0xa0000>;
  100. read-only;
  101. };
  102. partition@170000 {
  103. label = "0:ART";
  104. reg = <0x170000 0x10000>;
  105. read-only;
  106. compatible = "nvmem-cells";
  107. #address-cells = <1>;
  108. #size-cells = <1>;
  109. precal_art_1000: precal@1000 {
  110. reg = <0x1000 0x2f20>;
  111. };
  112. precal_art_5000: precal@5000 {
  113. reg = <0x5000 0x2f20>;
  114. };
  115. };
  116. partition@180000 {
  117. label = "u_env";
  118. reg = <0x180000 0x40000>;
  119. };
  120. partition@1c0000 {
  121. label = "s_env";
  122. reg = <0x1c0000 0x20000>;
  123. };
  124. partition@1e0000 {
  125. label = "devinfo";
  126. reg = <0x1e0000 0x20000>;
  127. read-only;
  128. };
  129. };
  130. };
  131. nand@1 {
  132. reg = <1>;
  133. compatible = "spi-nand";
  134. spi-max-frequency = <24000000>;
  135. partitions {
  136. compatible = "fixed-partitions";
  137. #address-cells = <1>;
  138. #size-cells = <1>;
  139. partition@0 {
  140. label = "kernel";
  141. reg = <0x0000000 0x5000000>;
  142. };
  143. partition@600000 {
  144. label = "rootfs";
  145. reg = <0x0600000 0x4a00000>;
  146. };
  147. partition@5000000 {
  148. label = "alt_kernel";
  149. reg = <0x5000000 0x5000000>;
  150. };
  151. partition@5600000 {
  152. label = "alt_rootfs";
  153. reg = <0x5600000 0x4a00000>;
  154. };
  155. partition@a000000 {
  156. label = "sysdiag";
  157. reg = <0xa000000 0x0200000>;
  158. read-only;
  159. };
  160. partition@a200000 {
  161. label = "syscfg";
  162. reg = <0xa200000 0x5e00000>;
  163. read-only;
  164. };
  165. };
  166. };
  167. };
  168. &blsp1_uart1 {
  169. pinctrl-0 = <&serial_pins>;
  170. pinctrl-names = "default";
  171. status = "okay";
  172. };
  173. &mdio {
  174. status = "okay";
  175. pinctrl-0 = <&mdio_pins>;
  176. pinctrl-names = "default";
  177. phy-reset-gpio = <&tlmm 62 GPIO_ACTIVE_HIGH>;
  178. };
  179. &tlmm {
  180. mdio_pins: mdio_pinmux {
  181. mux_mdio {
  182. pins = "gpio53";
  183. function = "mdio";
  184. bias-pull-up;
  185. };
  186. mux_mdc {
  187. pins = "gpio52";
  188. function = "mdc";
  189. bias-pull-up;
  190. };
  191. };
  192. serial_pins: serial_pinmux {
  193. mux {
  194. pins = "gpio60", "gpio61";
  195. function = "blsp_uart0";
  196. bias-disable;
  197. };
  198. };
  199. spi_0_pins: spi_0_pinmux {
  200. pinmux {
  201. function = "blsp_spi0";
  202. pins = "gpio55", "gpio56", "gpio57";
  203. };
  204. pinmux_cs {
  205. function = "gpio";
  206. pins = "gpio54", "gpio4";
  207. };
  208. pinconf {
  209. pins = "gpio55", "gpio56", "gpio57";
  210. drive-strength = <12>;
  211. bias-disable;
  212. };
  213. pinconf_cs {
  214. pins = "gpio54", "gpio4";
  215. drive-strength = <2>;
  216. bias-disable;
  217. output-high;
  218. };
  219. };
  220. i2c_0_pins: i2c_0_pinmux {
  221. mux {
  222. function = "blsp_i2c0";
  223. pins = "gpio58", "gpio59";
  224. bias-disable;
  225. };
  226. };
  227. reset_pinmux {
  228. mux {
  229. pins = "gpio63";
  230. bias-pull-up;
  231. };
  232. };
  233. };
  234. &usb2 {
  235. status = "okay";
  236. };
  237. &usb2_hs_phy {
  238. status = "okay";
  239. };
  240. &usb3 {
  241. status = "okay";
  242. };
  243. &usb3_hs_phy {
  244. status = "okay";
  245. };
  246. &usb3_ss_phy {
  247. status = "okay";
  248. };
  249. &watchdog {
  250. status = "okay";
  251. };
  252. &wifi0 {
  253. status = "okay";
  254. qcom,ath10k-calibration-variant = "linksys-whw01-v1";
  255. nvmem-cell-names = "pre-calibration";
  256. nvmem-cells = <&precal_art_1000>;
  257. };
  258. &wifi1 {
  259. status = "okay";
  260. qcom,ath10k-calibration-variant = "linksys-whw01-v1";
  261. nvmem-cell-names = "pre-calibration";
  262. nvmem-cells = <&precal_art_5000>;
  263. };
  264. &gmac {
  265. status = "okay";
  266. };
  267. &switch {
  268. status = "okay";
  269. };
  270. &swport4 {
  271. status = "okay";
  272. label = "eth1";
  273. };
  274. &swport5 {
  275. status = "okay";
  276. label = "eth2";
  277. };