fallback-sprom.c 26 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * SSB Fallback SPROM Driver
  4. *
  5. * Copyright (C) 2020 Álvaro Fernández Rojas <[email protected]>
  6. * Copyright (C) 2014 Jonas Gorski <[email protected]>
  7. * Copyright (C) 2008 Maxime Bizon <[email protected]>
  8. * Copyright (C) 2008 Florian Fainelli <[email protected]>
  9. */
  10. #include <linux/etherdevice.h>
  11. #include <linux/firmware.h>
  12. #include <linux/init.h>
  13. #include <linux/kernel.h>
  14. #include <linux/mtd/mtd.h>
  15. #include <linux/of_net.h>
  16. #include <linux/of_platform.h>
  17. #include <linux/ssb/ssb.h>
  18. #define SSB_FBS_MAX_SIZE 440
  19. /* Get the word-offset for a SSB_SPROM_XXX define. */
  20. #define SPOFF(offset) ((offset) / sizeof(u16))
  21. /* Helper to extract some _offset, which is one of the SSB_SPROM_XXX defines. */
  22. #define SPEX16(_outvar, _offset, _mask, _shift) \
  23. out->_outvar = ((in[SPOFF(_offset)] & (_mask)) >> (_shift))
  24. #define SPEX32(_outvar, _offset, _mask, _shift) \
  25. out->_outvar = ((((u32)in[SPOFF((_offset)+2)] << 16 | \
  26. in[SPOFF(_offset)]) & (_mask)) >> (_shift))
  27. #define SPEX(_outvar, _offset, _mask, _shift) \
  28. SPEX16(_outvar, _offset, _mask, _shift)
  29. #define SPEX_ARRAY8(_field, _offset, _mask, _shift) \
  30. do { \
  31. SPEX(_field[0], _offset + 0, _mask, _shift); \
  32. SPEX(_field[1], _offset + 2, _mask, _shift); \
  33. SPEX(_field[2], _offset + 4, _mask, _shift); \
  34. SPEX(_field[3], _offset + 6, _mask, _shift); \
  35. SPEX(_field[4], _offset + 8, _mask, _shift); \
  36. SPEX(_field[5], _offset + 10, _mask, _shift); \
  37. SPEX(_field[6], _offset + 12, _mask, _shift); \
  38. SPEX(_field[7], _offset + 14, _mask, _shift); \
  39. } while (0)
  40. struct ssb_fbs {
  41. struct device *dev;
  42. struct list_head list;
  43. struct ssb_sprom sprom;
  44. u32 pci_bus;
  45. u32 pci_dev;
  46. bool devid_override;
  47. };
  48. static DEFINE_SPINLOCK(ssb_fbs_lock);
  49. static struct list_head ssb_fbs_list = LIST_HEAD_INIT(ssb_fbs_list);
  50. int ssb_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
  51. {
  52. struct ssb_fbs *pos;
  53. u32 pci_bus, pci_dev;
  54. if (bus->bustype != SSB_BUSTYPE_PCI)
  55. return -ENOENT;
  56. pci_bus = bus->host_pci->bus->number;
  57. pci_dev = PCI_SLOT(bus->host_pci->devfn);
  58. list_for_each_entry(pos, &ssb_fbs_list, list) {
  59. if (pos->pci_bus != pci_bus ||
  60. pos->pci_dev != pci_dev)
  61. continue;
  62. if (pos->devid_override)
  63. bus->host_pci->device = pos->sprom.dev_id;
  64. memcpy(out, &pos->sprom, sizeof(struct ssb_sprom));
  65. dev_info(pos->dev, "requested by [%x:%x]",
  66. pos->pci_bus, pos->pci_dev);
  67. return 0;
  68. }
  69. pr_err("unable to fill SPROM for [%x:%x]\n", pci_bus, pci_dev);
  70. return -EINVAL;
  71. }
  72. static s8 sprom_extract_antgain(u8 sprom_revision, const u16 *in, u16 offset,
  73. u16 mask, u16 shift)
  74. {
  75. u16 v;
  76. u8 gain;
  77. v = in[SPOFF(offset)];
  78. gain = (v & mask) >> shift;
  79. if (gain == 0xFF)
  80. gain = 2; /* If unset use 2dBm */
  81. if (sprom_revision == 1) {
  82. /* Convert to Q5.2 */
  83. gain <<= 2;
  84. } else {
  85. /* Q5.2 Fractional part is stored in 0xC0 */
  86. gain = ((gain & 0xC0) >> 6) | ((gain & 0x3F) << 2);
  87. }
  88. return (s8)gain;
  89. }
  90. static void sprom_extract_r23(struct ssb_sprom *out, const u16 *in)
  91. {
  92. SPEX(boardflags_hi, SSB_SPROM2_BFLHI, 0xFFFF, 0);
  93. SPEX(opo, SSB_SPROM2_OPO, SSB_SPROM2_OPO_VALUE, 0);
  94. SPEX(pa1lob0, SSB_SPROM2_PA1LOB0, 0xFFFF, 0);
  95. SPEX(pa1lob1, SSB_SPROM2_PA1LOB1, 0xFFFF, 0);
  96. SPEX(pa1lob2, SSB_SPROM2_PA1LOB2, 0xFFFF, 0);
  97. SPEX(pa1hib0, SSB_SPROM2_PA1HIB0, 0xFFFF, 0);
  98. SPEX(pa1hib1, SSB_SPROM2_PA1HIB1, 0xFFFF, 0);
  99. SPEX(pa1hib2, SSB_SPROM2_PA1HIB2, 0xFFFF, 0);
  100. SPEX(maxpwr_ah, SSB_SPROM2_MAXP_A, SSB_SPROM2_MAXP_A_HI, 0);
  101. SPEX(maxpwr_al, SSB_SPROM2_MAXP_A, SSB_SPROM2_MAXP_A_LO,
  102. SSB_SPROM2_MAXP_A_LO_SHIFT);
  103. }
  104. static void sprom_extract_r123(struct ssb_sprom *out, const u16 *in)
  105. {
  106. SPEX(et0phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0A, 0);
  107. SPEX(et1phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1A,
  108. SSB_SPROM1_ETHPHY_ET1A_SHIFT);
  109. SPEX(et0mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0M, 14);
  110. SPEX(et1mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1M, 15);
  111. SPEX(board_rev, SSB_SPROM1_BINF, SSB_SPROM1_BINF_BREV, 0);
  112. SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0);
  113. if (out->revision == 1)
  114. SPEX(country_code, SSB_SPROM1_BINF, SSB_SPROM1_BINF_CCODE,
  115. SSB_SPROM1_BINF_CCODE_SHIFT);
  116. SPEX(ant_available_a, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTA,
  117. SSB_SPROM1_BINF_ANTA_SHIFT);
  118. SPEX(ant_available_bg, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTBG,
  119. SSB_SPROM1_BINF_ANTBG_SHIFT);
  120. SPEX(pa0b0, SSB_SPROM1_PA0B0, 0xFFFF, 0);
  121. SPEX(pa0b1, SSB_SPROM1_PA0B1, 0xFFFF, 0);
  122. SPEX(pa0b2, SSB_SPROM1_PA0B2, 0xFFFF, 0);
  123. SPEX(pa1b0, SSB_SPROM1_PA1B0, 0xFFFF, 0);
  124. SPEX(pa1b1, SSB_SPROM1_PA1B1, 0xFFFF, 0);
  125. SPEX(pa1b2, SSB_SPROM1_PA1B2, 0xFFFF, 0);
  126. SPEX(gpio0, SSB_SPROM1_GPIOA, SSB_SPROM1_GPIOA_P0, 0);
  127. SPEX(gpio1, SSB_SPROM1_GPIOA, SSB_SPROM1_GPIOA_P1,
  128. SSB_SPROM1_GPIOA_P1_SHIFT);
  129. SPEX(gpio2, SSB_SPROM1_GPIOB, SSB_SPROM1_GPIOB_P2, 0);
  130. SPEX(gpio3, SSB_SPROM1_GPIOB, SSB_SPROM1_GPIOB_P3,
  131. SSB_SPROM1_GPIOB_P3_SHIFT);
  132. SPEX(maxpwr_a, SSB_SPROM1_MAXPWR, SSB_SPROM1_MAXPWR_A,
  133. SSB_SPROM1_MAXPWR_A_SHIFT);
  134. SPEX(maxpwr_bg, SSB_SPROM1_MAXPWR, SSB_SPROM1_MAXPWR_BG, 0);
  135. SPEX(itssi_a, SSB_SPROM1_ITSSI, SSB_SPROM1_ITSSI_A,
  136. SSB_SPROM1_ITSSI_A_SHIFT);
  137. SPEX(itssi_bg, SSB_SPROM1_ITSSI, SSB_SPROM1_ITSSI_BG, 0);
  138. SPEX(boardflags_lo, SSB_SPROM1_BFLLO, 0xFFFF, 0);
  139. SPEX(alpha2[0], SSB_SPROM1_CCODE, 0xff00, 8);
  140. SPEX(alpha2[1], SSB_SPROM1_CCODE, 0x00ff, 0);
  141. /* Extract the antenna gain values. */
  142. out->antenna_gain.a0 = sprom_extract_antgain(out->revision, in,
  143. SSB_SPROM1_AGAIN,
  144. SSB_SPROM1_AGAIN_BG,
  145. SSB_SPROM1_AGAIN_BG_SHIFT);
  146. out->antenna_gain.a1 = sprom_extract_antgain(out->revision, in,
  147. SSB_SPROM1_AGAIN,
  148. SSB_SPROM1_AGAIN_A,
  149. SSB_SPROM1_AGAIN_A_SHIFT);
  150. if (out->revision >= 2)
  151. sprom_extract_r23(out, in);
  152. }
  153. /* Revs 4 5 and 8 have partially shared layout */
  154. static void sprom_extract_r458(struct ssb_sprom *out, const u16 *in)
  155. {
  156. SPEX(txpid2g[0], SSB_SPROM4_TXPID2G01,
  157. SSB_SPROM4_TXPID2G0, SSB_SPROM4_TXPID2G0_SHIFT);
  158. SPEX(txpid2g[1], SSB_SPROM4_TXPID2G01,
  159. SSB_SPROM4_TXPID2G1, SSB_SPROM4_TXPID2G1_SHIFT);
  160. SPEX(txpid2g[2], SSB_SPROM4_TXPID2G23,
  161. SSB_SPROM4_TXPID2G2, SSB_SPROM4_TXPID2G2_SHIFT);
  162. SPEX(txpid2g[3], SSB_SPROM4_TXPID2G23,
  163. SSB_SPROM4_TXPID2G3, SSB_SPROM4_TXPID2G3_SHIFT);
  164. SPEX(txpid5gl[0], SSB_SPROM4_TXPID5GL01,
  165. SSB_SPROM4_TXPID5GL0, SSB_SPROM4_TXPID5GL0_SHIFT);
  166. SPEX(txpid5gl[1], SSB_SPROM4_TXPID5GL01,
  167. SSB_SPROM4_TXPID5GL1, SSB_SPROM4_TXPID5GL1_SHIFT);
  168. SPEX(txpid5gl[2], SSB_SPROM4_TXPID5GL23,
  169. SSB_SPROM4_TXPID5GL2, SSB_SPROM4_TXPID5GL2_SHIFT);
  170. SPEX(txpid5gl[3], SSB_SPROM4_TXPID5GL23,
  171. SSB_SPROM4_TXPID5GL3, SSB_SPROM4_TXPID5GL3_SHIFT);
  172. SPEX(txpid5g[0], SSB_SPROM4_TXPID5G01,
  173. SSB_SPROM4_TXPID5G0, SSB_SPROM4_TXPID5G0_SHIFT);
  174. SPEX(txpid5g[1], SSB_SPROM4_TXPID5G01,
  175. SSB_SPROM4_TXPID5G1, SSB_SPROM4_TXPID5G1_SHIFT);
  176. SPEX(txpid5g[2], SSB_SPROM4_TXPID5G23,
  177. SSB_SPROM4_TXPID5G2, SSB_SPROM4_TXPID5G2_SHIFT);
  178. SPEX(txpid5g[3], SSB_SPROM4_TXPID5G23,
  179. SSB_SPROM4_TXPID5G3, SSB_SPROM4_TXPID5G3_SHIFT);
  180. SPEX(txpid5gh[0], SSB_SPROM4_TXPID5GH01,
  181. SSB_SPROM4_TXPID5GH0, SSB_SPROM4_TXPID5GH0_SHIFT);
  182. SPEX(txpid5gh[1], SSB_SPROM4_TXPID5GH01,
  183. SSB_SPROM4_TXPID5GH1, SSB_SPROM4_TXPID5GH1_SHIFT);
  184. SPEX(txpid5gh[2], SSB_SPROM4_TXPID5GH23,
  185. SSB_SPROM4_TXPID5GH2, SSB_SPROM4_TXPID5GH2_SHIFT);
  186. SPEX(txpid5gh[3], SSB_SPROM4_TXPID5GH23,
  187. SSB_SPROM4_TXPID5GH3, SSB_SPROM4_TXPID5GH3_SHIFT);
  188. }
  189. static void sprom_extract_r45(struct ssb_sprom *out, const u16 *in)
  190. {
  191. static const u16 pwr_info_offset[] = {
  192. SSB_SPROM4_PWR_INFO_CORE0, SSB_SPROM4_PWR_INFO_CORE1,
  193. SSB_SPROM4_PWR_INFO_CORE2, SSB_SPROM4_PWR_INFO_CORE3
  194. };
  195. int i;
  196. BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) !=
  197. ARRAY_SIZE(out->core_pwr_info));
  198. SPEX(et0phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET0A, 0);
  199. SPEX(et1phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET1A,
  200. SSB_SPROM4_ETHPHY_ET1A_SHIFT);
  201. SPEX(board_rev, SSB_SPROM4_BOARDREV, 0xFFFF, 0);
  202. SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0);
  203. if (out->revision == 4) {
  204. SPEX(alpha2[0], SSB_SPROM4_CCODE, 0xff00, 8);
  205. SPEX(alpha2[1], SSB_SPROM4_CCODE, 0x00ff, 0);
  206. SPEX(boardflags_lo, SSB_SPROM4_BFLLO, 0xFFFF, 0);
  207. SPEX(boardflags_hi, SSB_SPROM4_BFLHI, 0xFFFF, 0);
  208. SPEX(boardflags2_lo, SSB_SPROM4_BFL2LO, 0xFFFF, 0);
  209. SPEX(boardflags2_hi, SSB_SPROM4_BFL2HI, 0xFFFF, 0);
  210. } else {
  211. SPEX(alpha2[0], SSB_SPROM5_CCODE, 0xff00, 8);
  212. SPEX(alpha2[1], SSB_SPROM5_CCODE, 0x00ff, 0);
  213. SPEX(boardflags_lo, SSB_SPROM5_BFLLO, 0xFFFF, 0);
  214. SPEX(boardflags_hi, SSB_SPROM5_BFLHI, 0xFFFF, 0);
  215. SPEX(boardflags2_lo, SSB_SPROM5_BFL2LO, 0xFFFF, 0);
  216. SPEX(boardflags2_hi, SSB_SPROM5_BFL2HI, 0xFFFF, 0);
  217. }
  218. SPEX(ant_available_a, SSB_SPROM4_ANTAVAIL, SSB_SPROM4_ANTAVAIL_A,
  219. SSB_SPROM4_ANTAVAIL_A_SHIFT);
  220. SPEX(ant_available_bg, SSB_SPROM4_ANTAVAIL, SSB_SPROM4_ANTAVAIL_BG,
  221. SSB_SPROM4_ANTAVAIL_BG_SHIFT);
  222. SPEX(maxpwr_bg, SSB_SPROM4_MAXP_BG, SSB_SPROM4_MAXP_BG_MASK, 0);
  223. SPEX(itssi_bg, SSB_SPROM4_MAXP_BG, SSB_SPROM4_ITSSI_BG,
  224. SSB_SPROM4_ITSSI_BG_SHIFT);
  225. SPEX(maxpwr_a, SSB_SPROM4_MAXP_A, SSB_SPROM4_MAXP_A_MASK, 0);
  226. SPEX(itssi_a, SSB_SPROM4_MAXP_A, SSB_SPROM4_ITSSI_A,
  227. SSB_SPROM4_ITSSI_A_SHIFT);
  228. if (out->revision == 4) {
  229. SPEX(gpio0, SSB_SPROM4_GPIOA, SSB_SPROM4_GPIOA_P0, 0);
  230. SPEX(gpio1, SSB_SPROM4_GPIOA, SSB_SPROM4_GPIOA_P1,
  231. SSB_SPROM4_GPIOA_P1_SHIFT);
  232. SPEX(gpio2, SSB_SPROM4_GPIOB, SSB_SPROM4_GPIOB_P2, 0);
  233. SPEX(gpio3, SSB_SPROM4_GPIOB, SSB_SPROM4_GPIOB_P3,
  234. SSB_SPROM4_GPIOB_P3_SHIFT);
  235. } else {
  236. SPEX(gpio0, SSB_SPROM5_GPIOA, SSB_SPROM5_GPIOA_P0, 0);
  237. SPEX(gpio1, SSB_SPROM5_GPIOA, SSB_SPROM5_GPIOA_P1,
  238. SSB_SPROM5_GPIOA_P1_SHIFT);
  239. SPEX(gpio2, SSB_SPROM5_GPIOB, SSB_SPROM5_GPIOB_P2, 0);
  240. SPEX(gpio3, SSB_SPROM5_GPIOB, SSB_SPROM5_GPIOB_P3,
  241. SSB_SPROM5_GPIOB_P3_SHIFT);
  242. }
  243. /* Extract the antenna gain values. */
  244. out->antenna_gain.a0 = sprom_extract_antgain(out->revision, in,
  245. SSB_SPROM4_AGAIN01,
  246. SSB_SPROM4_AGAIN0,
  247. SSB_SPROM4_AGAIN0_SHIFT);
  248. out->antenna_gain.a1 = sprom_extract_antgain(out->revision, in,
  249. SSB_SPROM4_AGAIN01,
  250. SSB_SPROM4_AGAIN1,
  251. SSB_SPROM4_AGAIN1_SHIFT);
  252. out->antenna_gain.a2 = sprom_extract_antgain(out->revision, in,
  253. SSB_SPROM4_AGAIN23,
  254. SSB_SPROM4_AGAIN2,
  255. SSB_SPROM4_AGAIN2_SHIFT);
  256. out->antenna_gain.a3 = sprom_extract_antgain(out->revision, in,
  257. SSB_SPROM4_AGAIN23,
  258. SSB_SPROM4_AGAIN3,
  259. SSB_SPROM4_AGAIN3_SHIFT);
  260. /* Extract cores power info info */
  261. for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
  262. u16 o = pwr_info_offset[i];
  263. SPEX(core_pwr_info[i].itssi_2g, o + SSB_SPROM4_2G_MAXP_ITSSI,
  264. SSB_SPROM4_2G_ITSSI, SSB_SPROM4_2G_ITSSI_SHIFT);
  265. SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SPROM4_2G_MAXP_ITSSI,
  266. SSB_SPROM4_2G_MAXP, 0);
  267. SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SPROM4_2G_PA_0, ~0, 0);
  268. SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SPROM4_2G_PA_1, ~0, 0);
  269. SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SPROM4_2G_PA_2, ~0, 0);
  270. SPEX(core_pwr_info[i].pa_2g[3], o + SSB_SPROM4_2G_PA_3, ~0, 0);
  271. SPEX(core_pwr_info[i].itssi_5g, o + SSB_SPROM4_5G_MAXP_ITSSI,
  272. SSB_SPROM4_5G_ITSSI, SSB_SPROM4_5G_ITSSI_SHIFT);
  273. SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SPROM4_5G_MAXP_ITSSI,
  274. SSB_SPROM4_5G_MAXP, 0);
  275. SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM4_5GHL_MAXP,
  276. SSB_SPROM4_5GH_MAXP, 0);
  277. SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM4_5GHL_MAXP,
  278. SSB_SPROM4_5GL_MAXP, SSB_SPROM4_5GL_MAXP_SHIFT);
  279. SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SPROM4_5GL_PA_0, ~0, 0);
  280. SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SPROM4_5GL_PA_1, ~0, 0);
  281. SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SPROM4_5GL_PA_2, ~0, 0);
  282. SPEX(core_pwr_info[i].pa_5gl[3], o + SSB_SPROM4_5GL_PA_3, ~0, 0);
  283. SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SPROM4_5G_PA_0, ~0, 0);
  284. SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SPROM4_5G_PA_1, ~0, 0);
  285. SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SPROM4_5G_PA_2, ~0, 0);
  286. SPEX(core_pwr_info[i].pa_5g[3], o + SSB_SPROM4_5G_PA_3, ~0, 0);
  287. SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SPROM4_5GH_PA_0, ~0, 0);
  288. SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SPROM4_5GH_PA_1, ~0, 0);
  289. SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SPROM4_5GH_PA_2, ~0, 0);
  290. SPEX(core_pwr_info[i].pa_5gh[3], o + SSB_SPROM4_5GH_PA_3, ~0, 0);
  291. }
  292. sprom_extract_r458(out, in);
  293. /* TODO - get remaining rev 4 stuff needed */
  294. }
  295. static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in)
  296. {
  297. int i;
  298. u16 o;
  299. static const u16 pwr_info_offset[] = {
  300. SSB_SROM8_PWR_INFO_CORE0, SSB_SROM8_PWR_INFO_CORE1,
  301. SSB_SROM8_PWR_INFO_CORE2, SSB_SROM8_PWR_INFO_CORE3
  302. };
  303. BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) !=
  304. ARRAY_SIZE(out->core_pwr_info));
  305. SPEX(board_rev, SSB_SPROM8_BOARDREV, 0xFFFF, 0);
  306. SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0);
  307. SPEX(alpha2[0], SSB_SPROM8_CCODE, 0xff00, 8);
  308. SPEX(alpha2[1], SSB_SPROM8_CCODE, 0x00ff, 0);
  309. SPEX(boardflags_lo, SSB_SPROM8_BFLLO, 0xFFFF, 0);
  310. SPEX(boardflags_hi, SSB_SPROM8_BFLHI, 0xFFFF, 0);
  311. SPEX(boardflags2_lo, SSB_SPROM8_BFL2LO, 0xFFFF, 0);
  312. SPEX(boardflags2_hi, SSB_SPROM8_BFL2HI, 0xFFFF, 0);
  313. SPEX(ant_available_a, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_A,
  314. SSB_SPROM8_ANTAVAIL_A_SHIFT);
  315. SPEX(ant_available_bg, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_BG,
  316. SSB_SPROM8_ANTAVAIL_BG_SHIFT);
  317. SPEX(maxpwr_bg, SSB_SPROM8_MAXP_BG, SSB_SPROM8_MAXP_BG_MASK, 0);
  318. SPEX(itssi_bg, SSB_SPROM8_MAXP_BG, SSB_SPROM8_ITSSI_BG,
  319. SSB_SPROM8_ITSSI_BG_SHIFT);
  320. SPEX(maxpwr_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_MAXP_A_MASK, 0);
  321. SPEX(itssi_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_ITSSI_A,
  322. SSB_SPROM8_ITSSI_A_SHIFT);
  323. SPEX(maxpwr_ah, SSB_SPROM8_MAXP_AHL, SSB_SPROM8_MAXP_AH_MASK, 0);
  324. SPEX(maxpwr_al, SSB_SPROM8_MAXP_AHL, SSB_SPROM8_MAXP_AL_MASK,
  325. SSB_SPROM8_MAXP_AL_SHIFT);
  326. SPEX(gpio0, SSB_SPROM8_GPIOA, SSB_SPROM8_GPIOA_P0, 0);
  327. SPEX(gpio1, SSB_SPROM8_GPIOA, SSB_SPROM8_GPIOA_P1,
  328. SSB_SPROM8_GPIOA_P1_SHIFT);
  329. SPEX(gpio2, SSB_SPROM8_GPIOB, SSB_SPROM8_GPIOB_P2, 0);
  330. SPEX(gpio3, SSB_SPROM8_GPIOB, SSB_SPROM8_GPIOB_P3,
  331. SSB_SPROM8_GPIOB_P3_SHIFT);
  332. SPEX(tri2g, SSB_SPROM8_TRI25G, SSB_SPROM8_TRI2G, 0);
  333. SPEX(tri5g, SSB_SPROM8_TRI25G, SSB_SPROM8_TRI5G,
  334. SSB_SPROM8_TRI5G_SHIFT);
  335. SPEX(tri5gl, SSB_SPROM8_TRI5GHL, SSB_SPROM8_TRI5GL, 0);
  336. SPEX(tri5gh, SSB_SPROM8_TRI5GHL, SSB_SPROM8_TRI5GH,
  337. SSB_SPROM8_TRI5GH_SHIFT);
  338. SPEX(rxpo2g, SSB_SPROM8_RXPO, SSB_SPROM8_RXPO2G, 0);
  339. SPEX(rxpo5g, SSB_SPROM8_RXPO, SSB_SPROM8_RXPO5G,
  340. SSB_SPROM8_RXPO5G_SHIFT);
  341. SPEX(rssismf2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISMF2G, 0);
  342. SPEX(rssismc2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISMC2G,
  343. SSB_SPROM8_RSSISMC2G_SHIFT);
  344. SPEX(rssisav2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISAV2G,
  345. SSB_SPROM8_RSSISAV2G_SHIFT);
  346. SPEX(bxa2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_BXA2G,
  347. SSB_SPROM8_BXA2G_SHIFT);
  348. SPEX(rssismf5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISMF5G, 0);
  349. SPEX(rssismc5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISMC5G,
  350. SSB_SPROM8_RSSISMC5G_SHIFT);
  351. SPEX(rssisav5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISAV5G,
  352. SSB_SPROM8_RSSISAV5G_SHIFT);
  353. SPEX(bxa5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_BXA5G,
  354. SSB_SPROM8_BXA5G_SHIFT);
  355. SPEX(pa0b0, SSB_SPROM8_PA0B0, 0xFFFF, 0);
  356. SPEX(pa0b1, SSB_SPROM8_PA0B1, 0xFFFF, 0);
  357. SPEX(pa0b2, SSB_SPROM8_PA0B2, 0xFFFF, 0);
  358. SPEX(pa1b0, SSB_SPROM8_PA1B0, 0xFFFF, 0);
  359. SPEX(pa1b1, SSB_SPROM8_PA1B1, 0xFFFF, 0);
  360. SPEX(pa1b2, SSB_SPROM8_PA1B2, 0xFFFF, 0);
  361. SPEX(pa1lob0, SSB_SPROM8_PA1LOB0, 0xFFFF, 0);
  362. SPEX(pa1lob1, SSB_SPROM8_PA1LOB1, 0xFFFF, 0);
  363. SPEX(pa1lob2, SSB_SPROM8_PA1LOB2, 0xFFFF, 0);
  364. SPEX(pa1hib0, SSB_SPROM8_PA1HIB0, 0xFFFF, 0);
  365. SPEX(pa1hib1, SSB_SPROM8_PA1HIB1, 0xFFFF, 0);
  366. SPEX(pa1hib2, SSB_SPROM8_PA1HIB2, 0xFFFF, 0);
  367. SPEX(cck2gpo, SSB_SPROM8_CCK2GPO, 0xFFFF, 0);
  368. SPEX32(ofdm2gpo, SSB_SPROM8_OFDM2GPO, 0xFFFFFFFF, 0);
  369. SPEX32(ofdm5glpo, SSB_SPROM8_OFDM5GLPO, 0xFFFFFFFF, 0);
  370. SPEX32(ofdm5gpo, SSB_SPROM8_OFDM5GPO, 0xFFFFFFFF, 0);
  371. SPEX32(ofdm5ghpo, SSB_SPROM8_OFDM5GHPO, 0xFFFFFFFF, 0);
  372. /* Extract the antenna gain values. */
  373. out->antenna_gain.a0 = sprom_extract_antgain(out->revision, in,
  374. SSB_SPROM8_AGAIN01,
  375. SSB_SPROM8_AGAIN0,
  376. SSB_SPROM8_AGAIN0_SHIFT);
  377. out->antenna_gain.a1 = sprom_extract_antgain(out->revision, in,
  378. SSB_SPROM8_AGAIN01,
  379. SSB_SPROM8_AGAIN1,
  380. SSB_SPROM8_AGAIN1_SHIFT);
  381. out->antenna_gain.a2 = sprom_extract_antgain(out->revision, in,
  382. SSB_SPROM8_AGAIN23,
  383. SSB_SPROM8_AGAIN2,
  384. SSB_SPROM8_AGAIN2_SHIFT);
  385. out->antenna_gain.a3 = sprom_extract_antgain(out->revision, in,
  386. SSB_SPROM8_AGAIN23,
  387. SSB_SPROM8_AGAIN3,
  388. SSB_SPROM8_AGAIN3_SHIFT);
  389. /* Extract cores power info info */
  390. for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
  391. o = pwr_info_offset[i];
  392. SPEX(core_pwr_info[i].itssi_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
  393. SSB_SPROM8_2G_ITSSI, SSB_SPROM8_2G_ITSSI_SHIFT);
  394. SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
  395. SSB_SPROM8_2G_MAXP, 0);
  396. SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SROM8_2G_PA_0, ~0, 0);
  397. SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SROM8_2G_PA_1, ~0, 0);
  398. SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SROM8_2G_PA_2, ~0, 0);
  399. SPEX(core_pwr_info[i].itssi_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
  400. SSB_SPROM8_5G_ITSSI, SSB_SPROM8_5G_ITSSI_SHIFT);
  401. SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
  402. SSB_SPROM8_5G_MAXP, 0);
  403. SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM8_5GHL_MAXP,
  404. SSB_SPROM8_5GH_MAXP, 0);
  405. SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM8_5GHL_MAXP,
  406. SSB_SPROM8_5GL_MAXP, SSB_SPROM8_5GL_MAXP_SHIFT);
  407. SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SROM8_5GL_PA_0, ~0, 0);
  408. SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SROM8_5GL_PA_1, ~0, 0);
  409. SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SROM8_5GL_PA_2, ~0, 0);
  410. SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SROM8_5G_PA_0, ~0, 0);
  411. SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SROM8_5G_PA_1, ~0, 0);
  412. SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SROM8_5G_PA_2, ~0, 0);
  413. SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SROM8_5GH_PA_0, ~0, 0);
  414. SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SROM8_5GH_PA_1, ~0, 0);
  415. SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SROM8_5GH_PA_2, ~0, 0);
  416. }
  417. /* Extract FEM info */
  418. SPEX(fem.ghz2.tssipos, SSB_SPROM8_FEM2G,
  419. SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
  420. SPEX(fem.ghz2.extpa_gain, SSB_SPROM8_FEM2G,
  421. SSB_SROM8_FEM_EXTPA_GAIN, SSB_SROM8_FEM_EXTPA_GAIN_SHIFT);
  422. SPEX(fem.ghz2.pdet_range, SSB_SPROM8_FEM2G,
  423. SSB_SROM8_FEM_PDET_RANGE, SSB_SROM8_FEM_PDET_RANGE_SHIFT);
  424. SPEX(fem.ghz2.tr_iso, SSB_SPROM8_FEM2G,
  425. SSB_SROM8_FEM_TR_ISO, SSB_SROM8_FEM_TR_ISO_SHIFT);
  426. SPEX(fem.ghz2.antswlut, SSB_SPROM8_FEM2G,
  427. SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT);
  428. SPEX(fem.ghz5.tssipos, SSB_SPROM8_FEM5G,
  429. SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
  430. SPEX(fem.ghz5.extpa_gain, SSB_SPROM8_FEM5G,
  431. SSB_SROM8_FEM_EXTPA_GAIN, SSB_SROM8_FEM_EXTPA_GAIN_SHIFT);
  432. SPEX(fem.ghz5.pdet_range, SSB_SPROM8_FEM5G,
  433. SSB_SROM8_FEM_PDET_RANGE, SSB_SROM8_FEM_PDET_RANGE_SHIFT);
  434. SPEX(fem.ghz5.tr_iso, SSB_SPROM8_FEM5G,
  435. SSB_SROM8_FEM_TR_ISO, SSB_SROM8_FEM_TR_ISO_SHIFT);
  436. SPEX(fem.ghz5.antswlut, SSB_SPROM8_FEM5G,
  437. SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT);
  438. SPEX(leddc_on_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_ON,
  439. SSB_SPROM8_LEDDC_ON_SHIFT);
  440. SPEX(leddc_off_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_OFF,
  441. SSB_SPROM8_LEDDC_OFF_SHIFT);
  442. SPEX(txchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_TXCHAIN,
  443. SSB_SPROM8_TXRXC_TXCHAIN_SHIFT);
  444. SPEX(rxchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_RXCHAIN,
  445. SSB_SPROM8_TXRXC_RXCHAIN_SHIFT);
  446. SPEX(antswitch, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_SWITCH,
  447. SSB_SPROM8_TXRXC_SWITCH_SHIFT);
  448. SPEX(opo, SSB_SPROM8_OFDM2GPO, 0x00ff, 0);
  449. SPEX_ARRAY8(mcs2gpo, SSB_SPROM8_2G_MCSPO, ~0, 0);
  450. SPEX_ARRAY8(mcs5gpo, SSB_SPROM8_5G_MCSPO, ~0, 0);
  451. SPEX_ARRAY8(mcs5glpo, SSB_SPROM8_5GL_MCSPO, ~0, 0);
  452. SPEX_ARRAY8(mcs5ghpo, SSB_SPROM8_5GH_MCSPO, ~0, 0);
  453. SPEX(rawtempsense, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_RAWTEMP,
  454. SSB_SPROM8_RAWTS_RAWTEMP_SHIFT);
  455. SPEX(measpower, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_MEASPOWER,
  456. SSB_SPROM8_RAWTS_MEASPOWER_SHIFT);
  457. SPEX(tempsense_slope, SSB_SPROM8_OPT_CORRX,
  458. SSB_SPROM8_OPT_CORRX_TEMP_SLOPE,
  459. SSB_SPROM8_OPT_CORRX_TEMP_SLOPE_SHIFT);
  460. SPEX(tempcorrx, SSB_SPROM8_OPT_CORRX, SSB_SPROM8_OPT_CORRX_TEMPCORRX,
  461. SSB_SPROM8_OPT_CORRX_TEMPCORRX_SHIFT);
  462. SPEX(tempsense_option, SSB_SPROM8_OPT_CORRX,
  463. SSB_SPROM8_OPT_CORRX_TEMP_OPTION,
  464. SSB_SPROM8_OPT_CORRX_TEMP_OPTION_SHIFT);
  465. SPEX(freqoffset_corr, SSB_SPROM8_HWIQ_IQSWP,
  466. SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR,
  467. SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR_SHIFT);
  468. SPEX(iqcal_swp_dis, SSB_SPROM8_HWIQ_IQSWP,
  469. SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP,
  470. SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP_SHIFT);
  471. SPEX(hw_iqcal_en, SSB_SPROM8_HWIQ_IQSWP, SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL,
  472. SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL_SHIFT);
  473. SPEX(bw40po, SSB_SPROM8_BW40PO, ~0, 0);
  474. SPEX(cddpo, SSB_SPROM8_CDDPO, ~0, 0);
  475. SPEX(stbcpo, SSB_SPROM8_STBCPO, ~0, 0);
  476. SPEX(bwduppo, SSB_SPROM8_BWDUPPO, ~0, 0);
  477. SPEX(tempthresh, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_TRESH,
  478. SSB_SPROM8_THERMAL_TRESH_SHIFT);
  479. SPEX(tempoffset, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_OFFSET,
  480. SSB_SPROM8_THERMAL_OFFSET_SHIFT);
  481. SPEX(phycal_tempdelta, SSB_SPROM8_TEMPDELTA,
  482. SSB_SPROM8_TEMPDELTA_PHYCAL,
  483. SSB_SPROM8_TEMPDELTA_PHYCAL_SHIFT);
  484. SPEX(temps_period, SSB_SPROM8_TEMPDELTA, SSB_SPROM8_TEMPDELTA_PERIOD,
  485. SSB_SPROM8_TEMPDELTA_PERIOD_SHIFT);
  486. SPEX(temps_hysteresis, SSB_SPROM8_TEMPDELTA,
  487. SSB_SPROM8_TEMPDELTA_HYSTERESIS,
  488. SSB_SPROM8_TEMPDELTA_HYSTERESIS_SHIFT);
  489. sprom_extract_r458(out, in);
  490. /* TODO - get remaining rev 8 stuff needed */
  491. }
  492. static int sprom_extract(struct ssb_fbs *priv, const u16 *in, u16 size)
  493. {
  494. struct ssb_sprom *out = &priv->sprom;
  495. memset(out, 0, sizeof(*out));
  496. out->revision = in[size - 1] & 0x00FF;
  497. switch (out->revision) {
  498. case 1:
  499. case 2:
  500. case 3:
  501. sprom_extract_r123(out, in);
  502. break;
  503. case 4:
  504. case 5:
  505. sprom_extract_r45(out, in);
  506. break;
  507. case 8:
  508. sprom_extract_r8(out, in);
  509. break;
  510. default:
  511. dev_warn(priv->dev,
  512. "Unsupported SPROM revision %d detected."
  513. " Will extract v1\n",
  514. out->revision);
  515. out->revision = 1;
  516. sprom_extract_r123(out, in);
  517. }
  518. if (out->boardflags_lo == 0xFFFF)
  519. out->boardflags_lo = 0; /* per specs */
  520. if (out->boardflags_hi == 0xFFFF)
  521. out->boardflags_hi = 0; /* per specs */
  522. return 0;
  523. }
  524. static void ssb_fbs_fixup(struct ssb_fbs *priv, u16 *sprom)
  525. {
  526. struct device_node *node = priv->dev->of_node;
  527. u32 fixups, off, val;
  528. int i = 0;
  529. if (!of_get_property(node, "brcm,sprom-fixups", &fixups))
  530. return;
  531. fixups /= sizeof(u32);
  532. dev_info(priv->dev, "patching SPROM with %u fixups...\n", fixups >> 1);
  533. while (i < fixups) {
  534. if (of_property_read_u32_index(node, "brcm,sprom-fixups",
  535. i++, &off)) {
  536. dev_err(priv->dev, "error reading fixup[%u] offset\n",
  537. i - 1);
  538. return;
  539. }
  540. if (of_property_read_u32_index(node, "brcm,sprom-fixups",
  541. i++, &val)) {
  542. dev_err(priv->dev, "error reading fixup[%u] value\n",
  543. i - 1);
  544. return;
  545. }
  546. dev_dbg(priv->dev, "fixup[%d]=0x%04x\n", off, val);
  547. sprom[off] = val;
  548. }
  549. }
  550. static bool sprom_override_devid(struct ssb_fbs *priv, struct ssb_sprom *out,
  551. const u16 *in)
  552. {
  553. SPEX(dev_id, SSB_SPROM1_PID, 0xFFFF, 0);
  554. return !!out->dev_id;
  555. }
  556. static int ssb_fbs_set(struct ssb_fbs *priv, struct device_node *node)
  557. {
  558. struct ssb_sprom *sprom = &priv->sprom;
  559. const struct firmware *fw;
  560. const char *sprom_name;
  561. int err;
  562. if (of_property_read_string(node, "brcm,sprom", &sprom_name))
  563. sprom_name = NULL;
  564. if (sprom_name) {
  565. err = request_firmware_direct(&fw, sprom_name, priv->dev);
  566. if (err)
  567. dev_err(priv->dev, "%s load error\n", sprom_name);
  568. } else {
  569. err = -ENOENT;
  570. }
  571. if (err) {
  572. sprom->revision = 0x02;
  573. sprom->board_rev = 0x0017;
  574. sprom->country_code = 0x00;
  575. sprom->ant_available_bg = 0x03;
  576. sprom->pa0b0 = 0x15ae;
  577. sprom->pa0b1 = 0xfa85;
  578. sprom->pa0b2 = 0xfe8d;
  579. sprom->pa1b0 = 0xffff;
  580. sprom->pa1b1 = 0xffff;
  581. sprom->pa1b2 = 0xffff;
  582. sprom->gpio0 = 0xff;
  583. sprom->gpio1 = 0xff;
  584. sprom->gpio2 = 0xff;
  585. sprom->gpio3 = 0xff;
  586. sprom->maxpwr_bg = 0x4c;
  587. sprom->itssi_bg = 0x00;
  588. sprom->boardflags_lo = 0x2848;
  589. sprom->boardflags_hi = 0x0000;
  590. priv->devid_override = false;
  591. dev_warn(priv->dev, "using basic SPROM\n");
  592. } else {
  593. size_t size = min(fw->size, (size_t) SSB_FBS_MAX_SIZE);
  594. u16 tmp_sprom[SSB_FBS_MAX_SIZE >> 1];
  595. u32 i, j;
  596. for (i = 0, j = 0; i < size; i += 2, j++)
  597. tmp_sprom[j] = (fw->data[i] << 8) | fw->data[i + 1];
  598. release_firmware(fw);
  599. ssb_fbs_fixup(priv, tmp_sprom);
  600. sprom_extract(priv, tmp_sprom, size >> 1);
  601. priv->devid_override = sprom_override_devid(priv, sprom,
  602. tmp_sprom);
  603. }
  604. return 0;
  605. }
  606. static int ssb_fbs_probe(struct platform_device *pdev)
  607. {
  608. struct device *dev = &pdev->dev;
  609. struct device_node *node = dev->of_node;
  610. struct ssb_fbs *priv;
  611. unsigned long flags;
  612. u8 mac[ETH_ALEN];
  613. priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
  614. if (!priv)
  615. return -ENOMEM;
  616. priv->dev = dev;
  617. ssb_fbs_set(priv, node);
  618. of_property_read_u32(node, "pci-bus", &priv->pci_bus);
  619. of_property_read_u32(node, "pci-dev", &priv->pci_dev);
  620. of_get_mac_address(node, mac);
  621. if (is_valid_ether_addr(mac)) {
  622. dev_info(dev, "mtd mac %pM\n", mac);
  623. } else {
  624. eth_random_addr(mac);
  625. dev_info(dev, "random mac %pM\n", mac);
  626. }
  627. memcpy(priv->sprom.il0mac, mac, ETH_ALEN);
  628. memcpy(priv->sprom.et0mac, mac, ETH_ALEN);
  629. memcpy(priv->sprom.et1mac, mac, ETH_ALEN);
  630. memcpy(priv->sprom.et2mac, mac, ETH_ALEN);
  631. spin_lock_irqsave(&ssb_fbs_lock, flags);
  632. list_add(&priv->list, &ssb_fbs_list);
  633. spin_unlock_irqrestore(&ssb_fbs_lock, flags);
  634. dev_info(dev, "registered SPROM for [%x:%x]\n",
  635. priv->pci_bus, priv->pci_dev);
  636. return 0;
  637. }
  638. static const struct of_device_id ssb_fbs_of_match[] = {
  639. { .compatible = "brcm,ssb-sprom", },
  640. { /* sentinel */ }
  641. };
  642. MODULE_DEVICE_TABLE(of, ssb_fbs_of_match);
  643. static struct platform_driver ssb_fbs_driver = {
  644. .probe = ssb_fbs_probe,
  645. .driver = {
  646. .name = "ssb-sprom",
  647. .of_match_table = ssb_fbs_of_match,
  648. },
  649. };
  650. int __init ssb_fbs_register(void)
  651. {
  652. return platform_driver_register(&ssb_fbs_driver);
  653. }