adm6996.c 27 KB

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  1. /*
  2. * ADM6996 switch driver
  3. *
  4. * swconfig interface based on ar8216.c
  5. *
  6. * Copyright (c) 2008 Felix Fietkau <[email protected]>
  7. * VLAN support Copyright (c) 2010, 2011 Peter Lebbing <[email protected]>
  8. * Copyright (c) 2013 Hauke Mehrtens <[email protected]>
  9. * Copyright (c) 2014 Matti Laakso <[email protected]>
  10. *
  11. * This program is free software; you can redistribute it and/or modify it
  12. * under the terms of the GNU General Public License v2 as published by the
  13. * Free Software Foundation
  14. */
  15. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  16. /*#define DEBUG 1*/
  17. #include <linux/kernel.h>
  18. #include <linux/string.h>
  19. #include <linux/errno.h>
  20. #include <linux/unistd.h>
  21. #include <linux/slab.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/init.h>
  24. #include <linux/delay.h>
  25. #include <linux/gpio.h>
  26. #include <linux/netdevice.h>
  27. #include <linux/etherdevice.h>
  28. #include <linux/skbuff.h>
  29. #include <linux/spinlock.h>
  30. #include <linux/mm.h>
  31. #include <linux/module.h>
  32. #include <linux/mii.h>
  33. #include <linux/platform_device.h>
  34. #include <linux/platform_data/adm6996-gpio.h>
  35. #include <linux/ethtool.h>
  36. #include <linux/phy.h>
  37. #include <linux/switch.h>
  38. #include <asm/io.h>
  39. #include <asm/irq.h>
  40. #include <asm/uaccess.h>
  41. #include "adm6996.h"
  42. MODULE_DESCRIPTION("Infineon ADM6996 Switch");
  43. MODULE_AUTHOR("Felix Fietkau, Peter Lebbing <[email protected]>");
  44. MODULE_LICENSE("GPL");
  45. static const char * const adm6996_model_name[] =
  46. {
  47. NULL,
  48. "ADM6996FC",
  49. "ADM6996M",
  50. "ADM6996L"
  51. };
  52. struct adm6996_mib_desc {
  53. unsigned int offset;
  54. const char *name;
  55. };
  56. struct adm6996_priv {
  57. struct switch_dev dev;
  58. void *priv;
  59. u8 eecs;
  60. u8 eesk;
  61. u8 eedi;
  62. enum adm6996_model model;
  63. bool enable_vlan;
  64. bool vlan_enabled; /* Current hardware state */
  65. #ifdef DEBUG
  66. u16 addr; /* Debugging: register address to operate on */
  67. #endif
  68. u16 pvid[ADM_NUM_PORTS]; /* Primary VLAN ID */
  69. u8 tagged_ports;
  70. u16 vlan_id[ADM_NUM_VLANS];
  71. u8 vlan_table[ADM_NUM_VLANS]; /* bitmap, 1 = port is member */
  72. u8 vlan_tagged[ADM_NUM_VLANS]; /* bitmap, 1 = tagged member */
  73. struct mutex mib_lock;
  74. char buf[2048];
  75. struct mutex reg_mutex;
  76. /* use abstraction for regops, we want to add gpio support in the future */
  77. u16 (*read)(struct adm6996_priv *priv, enum admreg reg);
  78. void (*write)(struct adm6996_priv *priv, enum admreg reg, u16 val);
  79. };
  80. #define to_adm(_dev) container_of(_dev, struct adm6996_priv, dev)
  81. #define phy_to_adm(_phy) ((struct adm6996_priv *) (_phy)->priv)
  82. #define MIB_DESC(_o, _n) \
  83. { \
  84. .offset = (_o), \
  85. .name = (_n), \
  86. }
  87. static const struct adm6996_mib_desc adm6996_mibs[] = {
  88. MIB_DESC(ADM_CL0, "RxPacket"),
  89. MIB_DESC(ADM_CL6, "RxByte"),
  90. MIB_DESC(ADM_CL12, "TxPacket"),
  91. MIB_DESC(ADM_CL18, "TxByte"),
  92. MIB_DESC(ADM_CL24, "Collision"),
  93. MIB_DESC(ADM_CL30, "Error"),
  94. };
  95. #define ADM6996_MIB_RXB_ID 1
  96. #define ADM6996_MIB_TXB_ID 3
  97. static inline u16
  98. r16(struct adm6996_priv *priv, enum admreg reg)
  99. {
  100. return priv->read(priv, reg);
  101. }
  102. static inline void
  103. w16(struct adm6996_priv *priv, enum admreg reg, u16 val)
  104. {
  105. priv->write(priv, reg, val);
  106. }
  107. /* Minimum timing constants */
  108. #define EECK_EDGE_TIME 3 /* 3us - max(adm 2.5us, 93c 1us) */
  109. #define EEDI_SETUP_TIME 1 /* 1us - max(adm 10ns, 93c 400ns) */
  110. #define EECS_SETUP_TIME 1 /* 1us - max(adm no, 93c 200ns) */
  111. static void adm6996_gpio_write(struct adm6996_priv *priv, int cs, char *buf, unsigned int bits)
  112. {
  113. int i, len = (bits + 7) / 8;
  114. u8 mask;
  115. gpio_set_value(priv->eecs, cs);
  116. udelay(EECK_EDGE_TIME);
  117. /* Byte assemble from MSB to LSB */
  118. for (i = 0; i < len; i++) {
  119. /* Bit bang from MSB to LSB */
  120. for (mask = 0x80; mask && bits > 0; mask >>= 1, bits --) {
  121. /* Clock low */
  122. gpio_set_value(priv->eesk, 0);
  123. udelay(EECK_EDGE_TIME);
  124. /* Output on rising edge */
  125. gpio_set_value(priv->eedi, (mask & buf[i]));
  126. udelay(EEDI_SETUP_TIME);
  127. /* Clock high */
  128. gpio_set_value(priv->eesk, 1);
  129. udelay(EECK_EDGE_TIME);
  130. }
  131. }
  132. /* Clock low */
  133. gpio_set_value(priv->eesk, 0);
  134. udelay(EECK_EDGE_TIME);
  135. if (cs)
  136. gpio_set_value(priv->eecs, 0);
  137. }
  138. static void adm6996_gpio_read(struct adm6996_priv *priv, int cs, char *buf, unsigned int bits)
  139. {
  140. int i, len = (bits + 7) / 8;
  141. u8 mask;
  142. gpio_set_value(priv->eecs, cs);
  143. udelay(EECK_EDGE_TIME);
  144. /* Byte assemble from MSB to LSB */
  145. for (i = 0; i < len; i++) {
  146. u8 byte;
  147. /* Bit bang from MSB to LSB */
  148. for (mask = 0x80, byte = 0; mask && bits > 0; mask >>= 1, bits --) {
  149. u8 gp;
  150. /* Clock low */
  151. gpio_set_value(priv->eesk, 0);
  152. udelay(EECK_EDGE_TIME);
  153. /* Input on rising edge */
  154. gp = gpio_get_value(priv->eedi);
  155. if (gp)
  156. byte |= mask;
  157. /* Clock high */
  158. gpio_set_value(priv->eesk, 1);
  159. udelay(EECK_EDGE_TIME);
  160. }
  161. *buf++ = byte;
  162. }
  163. /* Clock low */
  164. gpio_set_value(priv->eesk, 0);
  165. udelay(EECK_EDGE_TIME);
  166. if (cs)
  167. gpio_set_value(priv->eecs, 0);
  168. }
  169. /* Advance clock(s) */
  170. static void adm6996_gpio_adclk(struct adm6996_priv *priv, int clocks)
  171. {
  172. int i;
  173. for (i = 0; i < clocks; i++) {
  174. /* Clock high */
  175. gpio_set_value(priv->eesk, 1);
  176. udelay(EECK_EDGE_TIME);
  177. /* Clock low */
  178. gpio_set_value(priv->eesk, 0);
  179. udelay(EECK_EDGE_TIME);
  180. }
  181. }
  182. static u16
  183. adm6996_read_gpio_reg(struct adm6996_priv *priv, enum admreg reg)
  184. {
  185. /* cmd: 01 10 T DD R RRRRRR */
  186. u8 bits[6] = {
  187. 0xFF, 0xFF, 0xFF, 0xFF,
  188. (0x06 << 4) | ((0 & 0x01) << 3 | (reg&64)>>6),
  189. ((reg&63)<<2)
  190. };
  191. u8 rbits[4];
  192. /* Enable GPIO outputs with all pins to 0 */
  193. gpio_direction_output(priv->eecs, 0);
  194. gpio_direction_output(priv->eesk, 0);
  195. gpio_direction_output(priv->eedi, 0);
  196. adm6996_gpio_write(priv, 0, bits, 46);
  197. gpio_direction_input(priv->eedi);
  198. adm6996_gpio_adclk(priv, 2);
  199. adm6996_gpio_read(priv, 0, rbits, 32);
  200. /* Extra clock(s) required per datasheet */
  201. adm6996_gpio_adclk(priv, 2);
  202. /* Disable GPIO outputs */
  203. gpio_direction_input(priv->eecs);
  204. gpio_direction_input(priv->eesk);
  205. /* EEPROM has 16-bit registers, but pumps out two registers in one request */
  206. return (reg & 0x01 ? (rbits[0]<<8) | rbits[1] : (rbits[2]<<8) | (rbits[3]));
  207. }
  208. /* Write chip configuration register */
  209. /* Follow 93c66 timing and chip's min EEPROM timing requirement */
  210. static void
  211. adm6996_write_gpio_reg(struct adm6996_priv *priv, enum admreg reg, u16 val)
  212. {
  213. /* cmd(27bits): sb(1) + opc(01) + addr(bbbbbbbb) + data(bbbbbbbbbbbbbbbb) */
  214. u8 bits[4] = {
  215. (0x05 << 5) | (reg >> 3),
  216. (reg << 5) | (u8)(val >> 11),
  217. (u8)(val >> 3),
  218. (u8)(val << 5)
  219. };
  220. /* Enable GPIO outputs with all pins to 0 */
  221. gpio_direction_output(priv->eecs, 0);
  222. gpio_direction_output(priv->eesk, 0);
  223. gpio_direction_output(priv->eedi, 0);
  224. /* Write cmd. Total 27 bits */
  225. adm6996_gpio_write(priv, 1, bits, 27);
  226. /* Extra clock(s) required per datasheet */
  227. adm6996_gpio_adclk(priv, 2);
  228. /* Disable GPIO outputs */
  229. gpio_direction_input(priv->eecs);
  230. gpio_direction_input(priv->eesk);
  231. gpio_direction_input(priv->eedi);
  232. }
  233. static u16
  234. adm6996_read_mii_reg(struct adm6996_priv *priv, enum admreg reg)
  235. {
  236. struct phy_device *phydev = priv->priv;
  237. struct mii_bus *bus = phydev->mdio.bus;
  238. return bus->read(bus, PHYADDR(reg));
  239. }
  240. static void
  241. adm6996_write_mii_reg(struct adm6996_priv *priv, enum admreg reg, u16 val)
  242. {
  243. struct phy_device *phydev = priv->priv;
  244. struct mii_bus *bus = phydev->mdio.bus;
  245. bus->write(bus, PHYADDR(reg), val);
  246. }
  247. static int
  248. adm6996_set_enable_vlan(struct switch_dev *dev, const struct switch_attr *attr,
  249. struct switch_val *val)
  250. {
  251. struct adm6996_priv *priv = to_adm(dev);
  252. if (val->value.i > 1)
  253. return -EINVAL;
  254. priv->enable_vlan = val->value.i;
  255. return 0;
  256. };
  257. static int
  258. adm6996_get_enable_vlan(struct switch_dev *dev, const struct switch_attr *attr,
  259. struct switch_val *val)
  260. {
  261. struct adm6996_priv *priv = to_adm(dev);
  262. val->value.i = priv->enable_vlan;
  263. return 0;
  264. };
  265. #ifdef DEBUG
  266. static int
  267. adm6996_set_addr(struct switch_dev *dev, const struct switch_attr *attr,
  268. struct switch_val *val)
  269. {
  270. struct adm6996_priv *priv = to_adm(dev);
  271. if (val->value.i > 1023)
  272. return -EINVAL;
  273. priv->addr = val->value.i;
  274. return 0;
  275. };
  276. static int
  277. adm6996_get_addr(struct switch_dev *dev, const struct switch_attr *attr,
  278. struct switch_val *val)
  279. {
  280. struct adm6996_priv *priv = to_adm(dev);
  281. val->value.i = priv->addr;
  282. return 0;
  283. };
  284. static int
  285. adm6996_set_data(struct switch_dev *dev, const struct switch_attr *attr,
  286. struct switch_val *val)
  287. {
  288. struct adm6996_priv *priv = to_adm(dev);
  289. if (val->value.i > 65535)
  290. return -EINVAL;
  291. w16(priv, priv->addr, val->value.i);
  292. return 0;
  293. };
  294. static int
  295. adm6996_get_data(struct switch_dev *dev, const struct switch_attr *attr,
  296. struct switch_val *val)
  297. {
  298. struct adm6996_priv *priv = to_adm(dev);
  299. val->value.i = r16(priv, priv->addr);
  300. return 0;
  301. };
  302. #endif /* def DEBUG */
  303. static int
  304. adm6996_set_pvid(struct switch_dev *dev, int port, int vlan)
  305. {
  306. struct adm6996_priv *priv = to_adm(dev);
  307. pr_devel("set_pvid port %d vlan %d\n", port, vlan);
  308. if (vlan > ADM_VLAN_MAX_ID)
  309. return -EINVAL;
  310. priv->pvid[port] = vlan;
  311. return 0;
  312. }
  313. static int
  314. adm6996_get_pvid(struct switch_dev *dev, int port, int *vlan)
  315. {
  316. struct adm6996_priv *priv = to_adm(dev);
  317. pr_devel("get_pvid port %d\n", port);
  318. *vlan = priv->pvid[port];
  319. return 0;
  320. }
  321. static int
  322. adm6996_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
  323. struct switch_val *val)
  324. {
  325. struct adm6996_priv *priv = to_adm(dev);
  326. pr_devel("set_vid port %d vid %d\n", val->port_vlan, val->value.i);
  327. if (val->value.i > ADM_VLAN_MAX_ID)
  328. return -EINVAL;
  329. priv->vlan_id[val->port_vlan] = val->value.i;
  330. return 0;
  331. };
  332. static int
  333. adm6996_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
  334. struct switch_val *val)
  335. {
  336. struct adm6996_priv *priv = to_adm(dev);
  337. pr_devel("get_vid port %d\n", val->port_vlan);
  338. val->value.i = priv->vlan_id[val->port_vlan];
  339. return 0;
  340. };
  341. static int
  342. adm6996_get_ports(struct switch_dev *dev, struct switch_val *val)
  343. {
  344. struct adm6996_priv *priv = to_adm(dev);
  345. u8 ports = priv->vlan_table[val->port_vlan];
  346. u8 tagged = priv->vlan_tagged[val->port_vlan];
  347. int i;
  348. pr_devel("get_ports port_vlan %d\n", val->port_vlan);
  349. val->len = 0;
  350. for (i = 0; i < ADM_NUM_PORTS; i++) {
  351. struct switch_port *p;
  352. if (!(ports & (1 << i)))
  353. continue;
  354. p = &val->value.ports[val->len++];
  355. p->id = i;
  356. if (tagged & (1 << i))
  357. p->flags = (1 << SWITCH_PORT_FLAG_TAGGED);
  358. else
  359. p->flags = 0;
  360. }
  361. return 0;
  362. };
  363. static int
  364. adm6996_set_ports(struct switch_dev *dev, struct switch_val *val)
  365. {
  366. struct adm6996_priv *priv = to_adm(dev);
  367. u8 *ports = &priv->vlan_table[val->port_vlan];
  368. u8 *tagged = &priv->vlan_tagged[val->port_vlan];
  369. int i;
  370. pr_devel("set_ports port_vlan %d ports", val->port_vlan);
  371. *ports = 0;
  372. *tagged = 0;
  373. for (i = 0; i < val->len; i++) {
  374. struct switch_port *p = &val->value.ports[i];
  375. #ifdef DEBUG
  376. pr_cont(" %d%s", p->id,
  377. ((p->flags & (1 << SWITCH_PORT_FLAG_TAGGED)) ? "T" :
  378. ""));
  379. #endif
  380. if (p->flags & (1 << SWITCH_PORT_FLAG_TAGGED)) {
  381. *tagged |= (1 << p->id);
  382. priv->tagged_ports |= (1 << p->id);
  383. }
  384. *ports |= (1 << p->id);
  385. }
  386. #ifdef DEBUG
  387. pr_cont("\n");
  388. #endif
  389. return 0;
  390. };
  391. /*
  392. * Precondition: reg_mutex must be held
  393. */
  394. static void
  395. adm6996_enable_vlan(struct adm6996_priv *priv)
  396. {
  397. u16 reg;
  398. reg = r16(priv, ADM_OTBE_P2_PVID);
  399. reg &= ~(ADM_OTBE_MASK);
  400. w16(priv, ADM_OTBE_P2_PVID, reg);
  401. reg = r16(priv, ADM_IFNTE);
  402. reg &= ~(ADM_IFNTE_MASK);
  403. w16(priv, ADM_IFNTE, reg);
  404. reg = r16(priv, ADM_VID_CHECK);
  405. reg |= ADM_VID_CHECK_MASK;
  406. w16(priv, ADM_VID_CHECK, reg);
  407. reg = r16(priv, ADM_SYSC0);
  408. reg |= ADM_NTTE;
  409. reg &= ~(ADM_RVID1);
  410. w16(priv, ADM_SYSC0, reg);
  411. reg = r16(priv, ADM_SYSC3);
  412. reg |= ADM_TBV;
  413. w16(priv, ADM_SYSC3, reg);
  414. }
  415. static void
  416. adm6996_enable_vlan_6996l(struct adm6996_priv *priv)
  417. {
  418. u16 reg;
  419. reg = r16(priv, ADM_SYSC3);
  420. reg |= ADM_TBV;
  421. reg |= ADM_MAC_CLONE;
  422. w16(priv, ADM_SYSC3, reg);
  423. }
  424. /*
  425. * Disable VLANs
  426. *
  427. * Sets VLAN mapping for port-based VLAN with all ports connected to
  428. * eachother (this is also the power-on default).
  429. *
  430. * Precondition: reg_mutex must be held
  431. */
  432. static void
  433. adm6996_disable_vlan(struct adm6996_priv *priv)
  434. {
  435. u16 reg;
  436. int i;
  437. for (i = 0; i < ADM_NUM_VLANS; i++) {
  438. reg = ADM_VLAN_FILT_MEMBER_MASK;
  439. w16(priv, ADM_VLAN_FILT_L(i), reg);
  440. reg = ADM_VLAN_FILT_VALID | ADM_VLAN_FILT_VID(1);
  441. w16(priv, ADM_VLAN_FILT_H(i), reg);
  442. }
  443. reg = r16(priv, ADM_OTBE_P2_PVID);
  444. reg |= ADM_OTBE_MASK;
  445. w16(priv, ADM_OTBE_P2_PVID, reg);
  446. reg = r16(priv, ADM_IFNTE);
  447. reg |= ADM_IFNTE_MASK;
  448. w16(priv, ADM_IFNTE, reg);
  449. reg = r16(priv, ADM_VID_CHECK);
  450. reg &= ~(ADM_VID_CHECK_MASK);
  451. w16(priv, ADM_VID_CHECK, reg);
  452. reg = r16(priv, ADM_SYSC0);
  453. reg &= ~(ADM_NTTE);
  454. reg |= ADM_RVID1;
  455. w16(priv, ADM_SYSC0, reg);
  456. reg = r16(priv, ADM_SYSC3);
  457. reg &= ~(ADM_TBV);
  458. w16(priv, ADM_SYSC3, reg);
  459. }
  460. /*
  461. * Disable VLANs
  462. *
  463. * Sets VLAN mapping for port-based VLAN with all ports connected to
  464. * eachother (this is also the power-on default).
  465. *
  466. * Precondition: reg_mutex must be held
  467. */
  468. static void
  469. adm6996_disable_vlan_6996l(struct adm6996_priv *priv)
  470. {
  471. u16 reg;
  472. int i;
  473. for (i = 0; i < ADM_NUM_VLANS; i++) {
  474. w16(priv, ADM_VLAN_MAP(i), 0);
  475. }
  476. reg = r16(priv, ADM_SYSC3);
  477. reg &= ~(ADM_TBV);
  478. reg &= ~(ADM_MAC_CLONE);
  479. w16(priv, ADM_SYSC3, reg);
  480. }
  481. /*
  482. * Precondition: reg_mutex must be held
  483. */
  484. static void
  485. adm6996_apply_port_pvids(struct adm6996_priv *priv)
  486. {
  487. u16 reg;
  488. int i;
  489. for (i = 0; i < ADM_NUM_PORTS; i++) {
  490. reg = r16(priv, adm_portcfg[i]);
  491. reg &= ~(ADM_PORTCFG_PVID_MASK);
  492. reg |= ADM_PORTCFG_PVID(priv->pvid[i]);
  493. if (priv->model == ADM6996L) {
  494. if (priv->tagged_ports & (1 << i))
  495. reg |= (1 << 4);
  496. else
  497. reg &= ~(1 << 4);
  498. }
  499. w16(priv, adm_portcfg[i], reg);
  500. }
  501. w16(priv, ADM_P0_PVID, ADM_P0_PVID_VAL(priv->pvid[0]));
  502. w16(priv, ADM_P1_PVID, ADM_P1_PVID_VAL(priv->pvid[1]));
  503. reg = r16(priv, ADM_OTBE_P2_PVID);
  504. reg &= ~(ADM_P2_PVID_MASK);
  505. reg |= ADM_P2_PVID_VAL(priv->pvid[2]);
  506. w16(priv, ADM_OTBE_P2_PVID, reg);
  507. reg = ADM_P3_PVID_VAL(priv->pvid[3]);
  508. reg |= ADM_P4_PVID_VAL(priv->pvid[4]);
  509. w16(priv, ADM_P3_P4_PVID, reg);
  510. reg = r16(priv, ADM_P5_PVID);
  511. reg &= ~(ADM_P2_PVID_MASK);
  512. reg |= ADM_P5_PVID_VAL(priv->pvid[5]);
  513. w16(priv, ADM_P5_PVID, reg);
  514. }
  515. /*
  516. * Precondition: reg_mutex must be held
  517. */
  518. static void
  519. adm6996_apply_vlan_filters(struct adm6996_priv *priv)
  520. {
  521. u8 ports, tagged;
  522. u16 vid, reg;
  523. int i;
  524. for (i = 0; i < ADM_NUM_VLANS; i++) {
  525. vid = priv->vlan_id[i];
  526. ports = priv->vlan_table[i];
  527. tagged = priv->vlan_tagged[i];
  528. if (ports == 0) {
  529. /* Disable VLAN entry */
  530. w16(priv, ADM_VLAN_FILT_H(i), 0);
  531. w16(priv, ADM_VLAN_FILT_L(i), 0);
  532. continue;
  533. }
  534. reg = ADM_VLAN_FILT_MEMBER(ports);
  535. reg |= ADM_VLAN_FILT_TAGGED(tagged);
  536. w16(priv, ADM_VLAN_FILT_L(i), reg);
  537. reg = ADM_VLAN_FILT_VALID | ADM_VLAN_FILT_VID(vid);
  538. w16(priv, ADM_VLAN_FILT_H(i), reg);
  539. }
  540. }
  541. static void
  542. adm6996_apply_vlan_filters_6996l(struct adm6996_priv *priv)
  543. {
  544. u8 ports;
  545. u16 reg;
  546. int i;
  547. for (i = 0; i < ADM_NUM_VLANS; i++) {
  548. ports = priv->vlan_table[i];
  549. if (ports == 0) {
  550. /* Disable VLAN entry */
  551. w16(priv, ADM_VLAN_MAP(i), 0);
  552. continue;
  553. } else {
  554. reg = ADM_VLAN_FILT(ports);
  555. w16(priv, ADM_VLAN_MAP(i), reg);
  556. }
  557. }
  558. }
  559. static int
  560. adm6996_hw_apply(struct switch_dev *dev)
  561. {
  562. struct adm6996_priv *priv = to_adm(dev);
  563. pr_devel("hw_apply\n");
  564. mutex_lock(&priv->reg_mutex);
  565. if (!priv->enable_vlan) {
  566. if (priv->vlan_enabled) {
  567. if (priv->model == ADM6996L)
  568. adm6996_disable_vlan_6996l(priv);
  569. else
  570. adm6996_disable_vlan(priv);
  571. priv->vlan_enabled = 0;
  572. }
  573. goto out;
  574. }
  575. if (!priv->vlan_enabled) {
  576. if (priv->model == ADM6996L)
  577. adm6996_enable_vlan_6996l(priv);
  578. else
  579. adm6996_enable_vlan(priv);
  580. priv->vlan_enabled = 1;
  581. }
  582. adm6996_apply_port_pvids(priv);
  583. if (priv->model == ADM6996L)
  584. adm6996_apply_vlan_filters_6996l(priv);
  585. else
  586. adm6996_apply_vlan_filters(priv);
  587. out:
  588. mutex_unlock(&priv->reg_mutex);
  589. return 0;
  590. }
  591. /*
  592. * Reset the switch
  593. *
  594. * The ADM6996 can't do a software-initiated reset, so we just initialise the
  595. * registers we support in this driver.
  596. *
  597. * Precondition: reg_mutex must be held
  598. */
  599. static void
  600. adm6996_perform_reset (struct adm6996_priv *priv)
  601. {
  602. int i;
  603. /* initialize port and vlan settings */
  604. for (i = 0; i < ADM_NUM_PORTS - 1; i++) {
  605. w16(priv, adm_portcfg[i], ADM_PORTCFG_INIT |
  606. ADM_PORTCFG_PVID(0));
  607. }
  608. w16(priv, adm_portcfg[5], ADM_PORTCFG_CPU);
  609. if (priv->model == ADM6996M || priv->model == ADM6996FC) {
  610. /* reset all PHY ports */
  611. for (i = 0; i < ADM_PHY_PORTS; i++) {
  612. w16(priv, ADM_PHY_PORT(i), ADM_PHYCFG_INIT);
  613. }
  614. }
  615. priv->enable_vlan = 0;
  616. priv->vlan_enabled = 0;
  617. for (i = 0; i < ADM_NUM_PORTS; i++) {
  618. priv->pvid[i] = 0;
  619. }
  620. for (i = 0; i < ADM_NUM_VLANS; i++) {
  621. priv->vlan_id[i] = i;
  622. priv->vlan_table[i] = 0;
  623. priv->vlan_tagged[i] = 0;
  624. }
  625. if (priv->model == ADM6996M) {
  626. /* Clear VLAN priority map so prio's are unused */
  627. w16 (priv, ADM_VLAN_PRIOMAP, 0);
  628. adm6996_disable_vlan(priv);
  629. adm6996_apply_port_pvids(priv);
  630. } else if (priv->model == ADM6996L) {
  631. /* Clear VLAN priority map so prio's are unused */
  632. w16 (priv, ADM_VLAN_PRIOMAP, 0);
  633. adm6996_disable_vlan_6996l(priv);
  634. adm6996_apply_port_pvids(priv);
  635. }
  636. }
  637. static int
  638. adm6996_reset_switch(struct switch_dev *dev)
  639. {
  640. struct adm6996_priv *priv = to_adm(dev);
  641. pr_devel("reset\n");
  642. mutex_lock(&priv->reg_mutex);
  643. adm6996_perform_reset (priv);
  644. mutex_unlock(&priv->reg_mutex);
  645. return 0;
  646. }
  647. static int
  648. adm6996_get_port_link(struct switch_dev *dev, int port,
  649. struct switch_port_link *link)
  650. {
  651. struct adm6996_priv *priv = to_adm(dev);
  652. u16 reg = 0;
  653. if (port >= ADM_NUM_PORTS)
  654. return -EINVAL;
  655. switch (port) {
  656. case 0:
  657. reg = r16(priv, ADM_PS0);
  658. break;
  659. case 1:
  660. reg = r16(priv, ADM_PS0);
  661. reg = reg >> 8;
  662. break;
  663. case 2:
  664. reg = r16(priv, ADM_PS1);
  665. break;
  666. case 3:
  667. reg = r16(priv, ADM_PS1);
  668. reg = reg >> 8;
  669. break;
  670. case 4:
  671. reg = r16(priv, ADM_PS1);
  672. reg = reg >> 12;
  673. break;
  674. case 5:
  675. reg = r16(priv, ADM_PS2);
  676. /* Bits 0, 1, 3 and 4. */
  677. reg = (reg & 3) | ((reg & 24) >> 1);
  678. break;
  679. default:
  680. return -EINVAL;
  681. }
  682. link->link = reg & ADM_PS_LS;
  683. if (!link->link)
  684. return 0;
  685. link->aneg = true;
  686. link->duplex = reg & ADM_PS_DS;
  687. link->tx_flow = reg & ADM_PS_FCS;
  688. link->rx_flow = reg & ADM_PS_FCS;
  689. if (reg & ADM_PS_SS)
  690. link->speed = SWITCH_PORT_SPEED_100;
  691. else
  692. link->speed = SWITCH_PORT_SPEED_10;
  693. return 0;
  694. }
  695. static int
  696. adm6996_sw_get_port_mib(struct switch_dev *dev,
  697. const struct switch_attr *attr,
  698. struct switch_val *val)
  699. {
  700. struct adm6996_priv *priv = to_adm(dev);
  701. int port;
  702. char *buf = priv->buf;
  703. int i, len = 0;
  704. u32 reg = 0;
  705. port = val->port_vlan;
  706. if (port >= ADM_NUM_PORTS)
  707. return -EINVAL;
  708. mutex_lock(&priv->mib_lock);
  709. len += snprintf(buf + len, sizeof(priv->buf) - len,
  710. "Port %d MIB counters\n",
  711. port);
  712. for (i = 0; i < ARRAY_SIZE(adm6996_mibs); i++) {
  713. reg = r16(priv, adm6996_mibs[i].offset + ADM_OFFSET_PORT(port));
  714. reg += r16(priv, adm6996_mibs[i].offset + ADM_OFFSET_PORT(port) + 1) << 16;
  715. len += snprintf(buf + len, sizeof(priv->buf) - len,
  716. "%-12s: %u\n",
  717. adm6996_mibs[i].name,
  718. reg);
  719. }
  720. mutex_unlock(&priv->mib_lock);
  721. val->value.s = buf;
  722. val->len = len;
  723. return 0;
  724. }
  725. static int
  726. adm6996_get_port_stats(struct switch_dev *dev, int port,
  727. struct switch_port_stats *stats)
  728. {
  729. struct adm6996_priv *priv = to_adm(dev);
  730. int id;
  731. u32 reg = 0;
  732. if (port >= ADM_NUM_PORTS)
  733. return -EINVAL;
  734. mutex_lock(&priv->mib_lock);
  735. id = ADM6996_MIB_TXB_ID;
  736. reg = r16(priv, adm6996_mibs[id].offset + ADM_OFFSET_PORT(port));
  737. reg += r16(priv, adm6996_mibs[id].offset + ADM_OFFSET_PORT(port) + 1) << 16;
  738. stats->tx_bytes = reg;
  739. id = ADM6996_MIB_RXB_ID;
  740. reg = r16(priv, adm6996_mibs[id].offset + ADM_OFFSET_PORT(port));
  741. reg += r16(priv, adm6996_mibs[id].offset + ADM_OFFSET_PORT(port) + 1) << 16;
  742. stats->rx_bytes = reg;
  743. mutex_unlock(&priv->mib_lock);
  744. return 0;
  745. }
  746. static struct switch_attr adm6996_globals[] = {
  747. {
  748. .type = SWITCH_TYPE_INT,
  749. .name = "enable_vlan",
  750. .description = "Enable VLANs",
  751. .set = adm6996_set_enable_vlan,
  752. .get = adm6996_get_enable_vlan,
  753. },
  754. #ifdef DEBUG
  755. {
  756. .type = SWITCH_TYPE_INT,
  757. .name = "addr",
  758. .description =
  759. "Direct register access: set register address (0 - 1023)",
  760. .set = adm6996_set_addr,
  761. .get = adm6996_get_addr,
  762. },
  763. {
  764. .type = SWITCH_TYPE_INT,
  765. .name = "data",
  766. .description =
  767. "Direct register access: read/write to register (0 - 65535)",
  768. .set = adm6996_set_data,
  769. .get = adm6996_get_data,
  770. },
  771. #endif /* def DEBUG */
  772. };
  773. static struct switch_attr adm6996_port[] = {
  774. {
  775. .type = SWITCH_TYPE_STRING,
  776. .name = "mib",
  777. .description = "Get port's MIB counters",
  778. .set = NULL,
  779. .get = adm6996_sw_get_port_mib,
  780. },
  781. };
  782. static struct switch_attr adm6996_vlan[] = {
  783. {
  784. .type = SWITCH_TYPE_INT,
  785. .name = "vid",
  786. .description = "VLAN ID",
  787. .set = adm6996_set_vid,
  788. .get = adm6996_get_vid,
  789. },
  790. };
  791. static struct switch_dev_ops adm6996_ops = {
  792. .attr_global = {
  793. .attr = adm6996_globals,
  794. .n_attr = ARRAY_SIZE(adm6996_globals),
  795. },
  796. .attr_port = {
  797. .attr = adm6996_port,
  798. .n_attr = ARRAY_SIZE(adm6996_port),
  799. },
  800. .attr_vlan = {
  801. .attr = adm6996_vlan,
  802. .n_attr = ARRAY_SIZE(adm6996_vlan),
  803. },
  804. .get_port_pvid = adm6996_get_pvid,
  805. .set_port_pvid = adm6996_set_pvid,
  806. .get_vlan_ports = adm6996_get_ports,
  807. .set_vlan_ports = adm6996_set_ports,
  808. .apply_config = adm6996_hw_apply,
  809. .reset_switch = adm6996_reset_switch,
  810. .get_port_link = adm6996_get_port_link,
  811. .get_port_stats = adm6996_get_port_stats,
  812. };
  813. static int adm6996_switch_init(struct adm6996_priv *priv, const char *alias, struct net_device *netdev)
  814. {
  815. struct switch_dev *swdev;
  816. u16 test, old;
  817. if (!priv->model) {
  818. /* Detect type of chip */
  819. old = r16(priv, ADM_VID_CHECK);
  820. test = old ^ (1 << 12);
  821. w16(priv, ADM_VID_CHECK, test);
  822. test ^= r16(priv, ADM_VID_CHECK);
  823. if (test & (1 << 12)) {
  824. /*
  825. * Bit 12 of this register is read-only.
  826. * This is the FC model.
  827. */
  828. priv->model = ADM6996FC;
  829. } else {
  830. /* Bit 12 is read-write. This is the M model. */
  831. priv->model = ADM6996M;
  832. w16(priv, ADM_VID_CHECK, old);
  833. }
  834. }
  835. swdev = &priv->dev;
  836. swdev->name = (adm6996_model_name[priv->model]);
  837. swdev->cpu_port = ADM_CPU_PORT;
  838. swdev->ports = ADM_NUM_PORTS;
  839. swdev->vlans = ADM_NUM_VLANS;
  840. swdev->ops = &adm6996_ops;
  841. swdev->alias = alias;
  842. /* The ADM6996L connected through GPIOs does not support any switch
  843. status calls */
  844. if (priv->model == ADM6996L) {
  845. adm6996_ops.attr_port.n_attr = 0;
  846. adm6996_ops.get_port_link = NULL;
  847. }
  848. pr_info ("%s: %s model PHY found.\n", alias, swdev->name);
  849. mutex_lock(&priv->reg_mutex);
  850. adm6996_perform_reset (priv);
  851. mutex_unlock(&priv->reg_mutex);
  852. if (priv->model == ADM6996M || priv->model == ADM6996L) {
  853. return register_switch(swdev, netdev);
  854. }
  855. return -ENODEV;
  856. }
  857. static int adm6996_config_init(struct phy_device *pdev)
  858. {
  859. struct adm6996_priv *priv;
  860. int ret;
  861. pdev->supported = ADVERTISED_100baseT_Full;
  862. pdev->advertising = ADVERTISED_100baseT_Full;
  863. if (pdev->mdio.addr != 0) {
  864. pr_info ("%s: PHY overlaps ADM6996, providing fixed PHY 0x%x.\n"
  865. , pdev->attached_dev->name, pdev->mdio.addr);
  866. return 0;
  867. }
  868. priv = devm_kzalloc(&pdev->mdio.dev, sizeof(struct adm6996_priv), GFP_KERNEL);
  869. if (!priv)
  870. return -ENOMEM;
  871. mutex_init(&priv->reg_mutex);
  872. mutex_init(&priv->mib_lock);
  873. priv->priv = pdev;
  874. priv->read = adm6996_read_mii_reg;
  875. priv->write = adm6996_write_mii_reg;
  876. ret = adm6996_switch_init(priv, pdev->attached_dev->name, pdev->attached_dev);
  877. if (ret < 0)
  878. return ret;
  879. pdev->priv = priv;
  880. return 0;
  881. }
  882. /*
  883. * Warning: phydev->priv is NULL if phydev->mdio.addr != 0
  884. */
  885. static int adm6996_read_status(struct phy_device *phydev)
  886. {
  887. phydev->speed = SPEED_100;
  888. phydev->duplex = DUPLEX_FULL;
  889. phydev->link = 1;
  890. phydev->state = PHY_RUNNING;
  891. netif_carrier_on(phydev->attached_dev);
  892. phydev->adjust_link(phydev->attached_dev);
  893. return 0;
  894. }
  895. /*
  896. * Warning: phydev->priv is NULL if phydev->mdio.addr != 0
  897. */
  898. static int adm6996_config_aneg(struct phy_device *phydev)
  899. {
  900. return 0;
  901. }
  902. static int adm6996_fixup(struct phy_device *dev)
  903. {
  904. struct mii_bus *bus = dev->mdio.bus;
  905. u16 reg;
  906. /* Our custom registers are at PHY addresses 0-10. Claim those. */
  907. if (dev->mdio.addr > 10)
  908. return 0;
  909. /* look for the switch on the bus */
  910. reg = bus->read(bus, PHYADDR(ADM_SIG0)) & ADM_SIG0_MASK;
  911. if (reg != ADM_SIG0_VAL)
  912. return 0;
  913. reg = bus->read(bus, PHYADDR(ADM_SIG1)) & ADM_SIG1_MASK;
  914. if (reg != ADM_SIG1_VAL)
  915. return 0;
  916. dev->phy_id = (ADM_SIG0_VAL << 16) | ADM_SIG1_VAL;
  917. return 0;
  918. }
  919. static int adm6996_probe(struct phy_device *pdev)
  920. {
  921. return 0;
  922. }
  923. static void adm6996_remove(struct phy_device *pdev)
  924. {
  925. struct adm6996_priv *priv = phy_to_adm(pdev);
  926. if (priv && (priv->model == ADM6996M || priv->model == ADM6996L))
  927. unregister_switch(&priv->dev);
  928. }
  929. static int adm6996_soft_reset(struct phy_device *phydev)
  930. {
  931. /* we don't need an extra reset */
  932. return 0;
  933. }
  934. static struct phy_driver adm6996_phy_driver = {
  935. .name = "Infineon ADM6996",
  936. .phy_id = (ADM_SIG0_VAL << 16) | ADM_SIG1_VAL,
  937. .phy_id_mask = 0xffffffff,
  938. .features = PHY_BASIC_FEATURES,
  939. .probe = adm6996_probe,
  940. .remove = adm6996_remove,
  941. .config_init = &adm6996_config_init,
  942. .config_aneg = &adm6996_config_aneg,
  943. .read_status = &adm6996_read_status,
  944. .soft_reset = adm6996_soft_reset,
  945. };
  946. static int adm6996_gpio_probe(struct platform_device *pdev)
  947. {
  948. struct adm6996_gpio_platform_data *pdata = pdev->dev.platform_data;
  949. struct adm6996_priv *priv;
  950. int ret;
  951. if (!pdata)
  952. return -EINVAL;
  953. priv = devm_kzalloc(&pdev->dev, sizeof(struct adm6996_priv), GFP_KERNEL);
  954. if (!priv)
  955. return -ENOMEM;
  956. mutex_init(&priv->reg_mutex);
  957. mutex_init(&priv->mib_lock);
  958. priv->eecs = pdata->eecs;
  959. priv->eedi = pdata->eedi;
  960. priv->eesk = pdata->eesk;
  961. priv->model = pdata->model;
  962. priv->read = adm6996_read_gpio_reg;
  963. priv->write = adm6996_write_gpio_reg;
  964. ret = devm_gpio_request(&pdev->dev, priv->eecs, "adm_eecs");
  965. if (ret)
  966. return ret;
  967. ret = devm_gpio_request(&pdev->dev, priv->eedi, "adm_eedi");
  968. if (ret)
  969. return ret;
  970. ret = devm_gpio_request(&pdev->dev, priv->eesk, "adm_eesk");
  971. if (ret)
  972. return ret;
  973. ret = adm6996_switch_init(priv, dev_name(&pdev->dev), NULL);
  974. if (ret < 0)
  975. return ret;
  976. platform_set_drvdata(pdev, priv);
  977. return 0;
  978. }
  979. static int adm6996_gpio_remove(struct platform_device *pdev)
  980. {
  981. struct adm6996_priv *priv = platform_get_drvdata(pdev);
  982. if (priv && (priv->model == ADM6996M || priv->model == ADM6996L))
  983. unregister_switch(&priv->dev);
  984. return 0;
  985. }
  986. static struct platform_driver adm6996_gpio_driver = {
  987. .probe = adm6996_gpio_probe,
  988. .remove = adm6996_gpio_remove,
  989. .driver = {
  990. .name = "adm6996_gpio",
  991. },
  992. };
  993. static int __init adm6996_init(void)
  994. {
  995. int err;
  996. phy_register_fixup_for_id(PHY_ANY_ID, adm6996_fixup);
  997. err = phy_driver_register(&adm6996_phy_driver, THIS_MODULE);
  998. if (err)
  999. return err;
  1000. err = platform_driver_register(&adm6996_gpio_driver);
  1001. if (err)
  1002. phy_driver_unregister(&adm6996_phy_driver);
  1003. return err;
  1004. }
  1005. static void __exit adm6996_exit(void)
  1006. {
  1007. platform_driver_unregister(&adm6996_gpio_driver);
  1008. phy_driver_unregister(&adm6996_phy_driver);
  1009. }
  1010. module_init(adm6996_init);
  1011. module_exit(adm6996_exit);