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openwrt
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boot
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uboot-mediatek
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patches
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441-add-jdcloud_re-cp-03.patch

441-add-jdcloud_re-cp-03.patch 10 KB
История Исходник

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  1. --- /dev/null
    2. 

  2. +++ b/configs/mt7986a_jdcloud_re-cp-03_defconfig
    3. 

  3. @@ -0,0 +1,112 @@
    4. 

  4. +CONFIG_ARM=y
    5. 

  5. +CONFIG_SYS_HAS_NONCACHED_MEMORY=y
    6. 

  6. +CONFIG_POSITION_INDEPENDENT=y
    7. 

  7. +CONFIG_ARCH_MEDIATEK=y
    8. 

  8. +CONFIG_TEXT_BASE=0x41e00000
    9. 

  9. +CONFIG_SYS_MALLOC_F_LEN=0x4000
    10. 

  10. +CONFIG_NR_DRAM_BANKS=1
    11. 

  11. +CONFIG_ENV_SIZE=0x40000
    12. 

  12. +CONFIG_ENV_OFFSET=0x400000
    13. 

  13. +CONFIG_DEFAULT_DEVICE_TREE="mt7986a-jdcloud_re-cp-03"
    14. 

  14. +CONFIG_SYS_PROMPT="MT7986> "
    15. 

  15. +CONFIG_OF_LIBFDT_OVERLAY=y
    16. 

  16. +CONFIG_TARGET_MT7986=y
    17. 

  17. +CONFIG_PRE_CON_BUF_ADDR=0x4007EF00
    18. 

  18. +CONFIG_DEBUG_UART_BASE=0x11002000
    19. 

  19. +CONFIG_DEBUG_UART_CLOCK=40000000
    20. 

  20. +CONFIG_ENV_OFFSET_REDUND=0x440000
    21. 

  21. +CONFIG_SYS_LOAD_ADDR=0x46000000
    22. 

  22. +CONFIG_DEBUG_UART=y
    23. 

  23. +CONFIG_FIT=y
    24. 

  24. +CONFIG_BOOTDELAY=30
    25. 

  25. +CONFIG_AUTOBOOT_KEYED=y
    26. 

  26. +CONFIG_AUTOBOOT_MENU_SHOW=y
    27. 

  27. +CONFIG_DEFAULT_FDT_FILE="mediatek/mt7986a-jdcloud_re-cp-03.dtb"
    28. 

  28. +CONFIG_LOGLEVEL=7
    29. 

  29. +CONFIG_PRE_CONSOLE_BUFFER=y
    30. 

  30. +CONFIG_LOG=y
    31. 

  31. +CONFIG_BOARD_LATE_INIT=y
    32. 

  32. +CONFIG_HUSH_PARSER=y
    33. 

  33. +CONFIG_CMD_CPU=y
    34. 

  34. +CONFIG_CMD_LICENSE=y
    35. 

  35. +CONFIG_CMD_BOOTMENU=y
    36. 

  36. +CONFIG_CMD_ASKENV=y
    37. 

  37. +CONFIG_CMD_ERASEENV=y
    38. 

  38. +CONFIG_CMD_ENV_FLAGS=y
    39. 

  39. +CONFIG_CMD_STRINGS=y
    40. 

  40. +CONFIG_CMD_DM=y
    41. 

  41. +CONFIG_CMD_GPIO=y
    42. 

  42. +CONFIG_CMD_PWM=y
    43. 

  43. +CONFIG_CMD_GPT=y
    44. 

  44. +CONFIG_CMD_MMC=y
    45. 

  45. +CONFIG_CMD_PART=y
    46. 

  46. +CONFIG_CMD_DHCP=y
    47. 

  47. +CONFIG_CMD_TFTPSRV=y
    48. 

  48. +CONFIG_CMD_RARP=y
    49. 

  49. +CONFIG_CMD_PING=y
    50. 

  50. +CONFIG_CMD_CDP=y
    51. 

  51. +CONFIG_CMD_SNTP=y
    52. 

  52. +CONFIG_CMD_DNS=y
    53. 

  53. +CONFIG_CMD_LINK_LOCAL=y
    54. 

  54. +CONFIG_CMD_PXE=y
    55. 

  55. +CONFIG_CMD_CACHE=y
    56. 

  56. +CONFIG_CMD_PSTORE=y
    57. 

  57. +CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
    58. 

  58. +CONFIG_CMD_UUID=y
    59. 

  59. +CONFIG_CMD_HASH=y
    60. 

  60. +CONFIG_CMD_SMC=y
    61. 

  61. +CONFIG_CMD_EXT4=y
    62. 

  62. +CONFIG_CMD_FAT=y
    63. 

  63. +CONFIG_CMD_FS_GENERIC=y
    64. 

  64. +CONFIG_CMD_FS_UUID=y
    65. 

  65. +CONFIG_OF_EMBED=y
    66. 

  66. +CONFIG_ENV_OVERWRITE=y
    67. 

  67. +CONFIG_ENV_IS_IN_MMC=y
    68. 

  68. +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
    69. 

  69. +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
    70. 

  70. +CONFIG_USE_DEFAULT_ENV_FILE=y
    71. 

  71. +CONFIG_DEFAULT_ENV_FILE="jdcloud_re-cp-03_env"
    72. 

  72. +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
    73. 

  73. +CONFIG_VERSION_VARIABLE=y
    74. 

  74. +CONFIG_NET_RANDOM_ETHADDR=y
    75. 

  75. +CONFIG_NETCONSOLE=y
    76. 

  76. +CONFIG_USE_IPADDR=y
    77. 

  77. +CONFIG_IPADDR="192.168.1.1"
    78. 

  78. +CONFIG_USE_SERVERIP=y
    79. 

  79. +CONFIG_SERVERIP="192.168.1.254"
    80. 

  80. +CONFIG_REGMAP=y
    81. 

  81. +CONFIG_SYSCON=y
    82. 

  82. +CONFIG_BUTTON=y
    83. 

  83. +CONFIG_BUTTON_GPIO=y
    84. 

  84. +CONFIG_CLK=y
    85. 

  85. +CONFIG_GPIO_HOG=y
    86. 

  86. +CONFIG_LED=y
    87. 

  87. +CONFIG_LED_BLINK=y
    88. 

  88. +CONFIG_LED_GPIO=y
    89. 

  89. +CONFIG_SUPPORT_EMMC_BOOT=y
    90. 

  90. +CONFIG_MMC_HS200_SUPPORT=y
    91. 

  91. +CONFIG_MMC_MTK=y
    92. 

  92. +CONFIG_PHY_FIXED=y
    93. 

  93. +CONFIG_DM_MDIO=y
    94. 

  94. +CONFIG_MEDIATEK_ETH=y
    95. 

  95. +CONFIG_PHY=y
    96. 

  96. +CONFIG_PHY_MTK_TPHY=y
    97. 

  97. +CONFIG_PINCTRL=y
    98. 

  98. +CONFIG_PINCONF=y
    99. 

  99. +CONFIG_PINCTRL_MT7622=y
    100. 

  100. +CONFIG_PINCTRL_MT7986=y
    101. 

  101. +CONFIG_POWER_DOMAIN=y
    102. 

  102. +CONFIG_MTK_POWER_DOMAIN=y
    103. 

  103. +CONFIG_DM_REGULATOR=y
    104. 

  104. +CONFIG_DM_REGULATOR_FIXED=y
    105. 

  105. +CONFIG_DM_REGULATOR_GPIO=y
    106. 

  106. +CONFIG_DM_PWM=y
    107. 

  107. +CONFIG_PWM_MTK=y
    108. 

  108. +CONFIG_RAM=y
    109. 

  109. +CONFIG_SCSI=y
    110. 

  110. +CONFIG_DM_SCSI=y
    111. 

  111. +CONFIG_DM_SERIAL=y
    112. 

  112. +CONFIG_MTK_SERIAL=y
    113. 

  113. +CONFIG_ZSTD=y
    114. 

  114. +CONFIG_HEXDUMP=y
    115. 

  115. +CONFIG_LMB_MAX_REGIONS=64
    116. 

  116. --- /dev/null
    117. 

  117. +++ b/arch/arm/dts/mt7986a-jdcloud_re-cp-03.dts
    118. 

  118. @@ -0,0 +1,148 @@
    119. 

  119. +// SPDX-License-Identifier: GPL-2.0-or-later
    120. 

  120. +
    121. 

  121. +/dts-v1/;
    122. 

  122. +#include <dt-bindings/input/linux-event-codes.h>
    123. 

  123. +#include "mt7986.dtsi"
    124. 

  124. +#include <dt-bindings/gpio/gpio.h>
    125. 

  125. +
    126. 

  126. +/ {
    127. 

  127. +	#address-cells = <1>;
    128. 

  128. +	#size-cells = <1>;
    129. 

  129. +	model = "JDCloud RE-CP-03";
    130. 

  130. +	compatible = "mediatek,mt7986", "mediatek,mt7986-rfb";
    131. 

  131. +
    132. 

  132. +	chosen {
    133. 

  133. +		stdout-path = &uart0;
    134. 

  134. +		tick-timer = &timer0;
    135. 

  135. +	};
    136. 

  136. +
    137. 

  137. +	memory@40000000 {
    138. 

  138. +		device_type = "memory";
    139. 

  139. +		reg = <0x40000000 0x40000000>;
    140. 

  140. +	};
    141. 

  141. +
    142. 

  142. +	gpio-keys {
    143. 

  143. +		compatible = "gpio-keys";
    144. 

  144. +
    145. 

  145. +		button-joylink {
    146. 

  146. +			label = "joylink";
    147. 

  147. +			linux,code = <BTN_0>;
    148. 

  148. +			gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
    149. 

  149. +		};
    150. 

  150. +
    151. 

  151. +		button-reset {
    152. 

  152. +			label = "reset";
    153. 

  153. +			linux,code = <KEY_RESTART>;
    154. 

  154. +			gpios = <&gpio 9 GPIO_ACTIVE_LOW>;
    155. 

  155. +		};
    156. 

  156. +	};
    157. 

  157. +
    158. 

  158. +	gpio-leds {
    159. 

  159. +		compatible = "gpio-leds";
    160. 

  160. +
    161. 

  161. +		led-0 {
    162. 

  162. +			label = "blue:status";
    163. 

  163. +			gpios = <&gpio 7 GPIO_ACTIVE_HIGH>;
    164. 

  164. +			default-state = "off";
    165. 

  165. +		};
    166. 

  166. +
    167. 

  167. +		led-1 {
    168. 

  168. +			label = "red:status";
    169. 

  169. +			gpios = <&gpio 11 GPIO_ACTIVE_HIGH>;
    170. 

  170. +			default-state = "on";
    171. 

  171. +		};
    172. 

  172. +
    173. 

  173. +		led-2 {
    174. 

  174. +			label = "green:status";
    175. 

  175. +			gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
    176. 

  176. +			default-state = "off";
    177. 

  177. +		};
    178. 

  178. +	};
    179. 

  179. +
    180. 

  180. +	reg_1p8v: regulator-1p8v {
    181. 

  181. +		compatible = "regulator-fixed";
    182. 

  182. +		regulator-name = "fixed-1.8V";
    183. 

  183. +		regulator-min-microvolt = <1800000>;
    184. 

  184. +		regulator-max-microvolt = <1800000>;
    185. 

  185. +		regulator-boot-on;
    186. 

  186. +		regulator-always-on;
    187. 

  187. +	};
    188. 

  188. +
    189. 

  189. +	reg_3p3v: regulator-3p3v {
    190. 

  190. +		compatible = "regulator-fixed";
    191. 

  191. +		regulator-name = "fixed-3.3V";
    192. 

  192. +		regulator-min-microvolt = <3300000>;
    193. 

  193. +		regulator-max-microvolt = <3300000>;
    194. 

  194. +		regulator-boot-on;
    195. 

  195. +		regulator-always-on;
    196. 

  196. +	};
    197. 

  197. +};
    198. 

  198. +
    199. 

  199. +&eth {
    200. 

  200. +	status = "okay";
    201. 

  201. +	mediatek,gmac-id = <0>;
    202. 

  202. +	phy-mode = "2500base-x";
    203. 

  203. +	mediatek,switch = "mt7531";
    204. 

  204. +	reset-gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
    205. 

  205. +
    206. 

  206. +	fixed-link {
    207. 

  207. +		speed = <2500>;
    208. 

  208. +		full-duplex;
    209. 

  209. +	};
    210. 

  210. +};
    211. 

  211. +
    212. 

  212. +&mmc0 {
    213. 

  213. +	bus-width = <8>;
    214. 

  214. +	cap-mmc-highspeed;
    215. 

  215. +	cap-mmc-hw-reset;
    216. 

  216. +	max-frequency = <200000000>;
    217. 

  217. +	non-removable;
    218. 

  218. +	pinctrl-names = "default";
    219. 

  219. +	pinctrl-0 = <&mmc0_pins_default>;
    220. 

  220. +	vmmc-supply = <&reg_3p3v>;
    221. 

  221. +	vqmmc-supply = <&reg_1p8v>;
    222. 

  222. +	status = "okay";
    223. 

  223. +};
    224. 

  224. +
    225. 

  225. +&pinctrl {
    226. 

  226. +	mmc0_pins_default: mmc0default {
    227. 

  227. +		mux {
    228. 

  228. +			function = "flash";
    229. 

  229. +			groups =  "emmc_51";
    230. 

  230. +		};
    231. 

  231. +
    232. 

  232. +		conf-cmd-dat {
    233. 

  233. +			pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
    234. 

  234. +			       "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
    235. 

  235. +			       "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
    236. 

  236. +			input-enable;
    237. 

  237. +			drive-strength = <MTK_DRIVE_4mA>;
    238. 

  238. +			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
    239. 

  239. +		};
    240. 

  240. +
    241. 

  241. +		conf-clk {
    242. 

  242. +			pins = "EMMC_CK";
    243. 

  243. +			drive-strength = <MTK_DRIVE_6mA>;
    244. 

  244. +			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
    245. 

  245. +		};
    246. 

  246. +
    247. 

  247. +		conf-dsl {
    248. 

  248. +			pins = "EMMC_DSL";
    249. 

  249. +			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
    250. 

  250. +		};
    251. 

  251. +
    252. 

  252. +		conf-rst {
    253. 

  253. +			pins = "EMMC_RSTB";
    254. 

  254. +			drive-strength = <MTK_DRIVE_4mA>;
    255. 

  255. +			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
    256. 

  256. +		};
    257. 

  257. +	};
    258. 

  258. +};
    259. 

  259. +
    260. 

  260. +&uart0 {
    261. 

  261. +	status = "okay";
    262. 

  262. +};
    263. 

  263. +
    264. 

  264. +&watchdog {
    265. 

  265. +	status = "disabled";
    266. 

  266. +};
    267. 

  267. --- /dev/null
    268. 

  268. +++ b/jdcloud_re-cp-03_env
    269. 

  269. @@ -0,0 +1,55 @@
    270. 

  270. +ipaddr=192.168.1.1
    271. 

  271. +serverip=192.168.1.254
    272. 

  272. +loadaddr=0x46000000
    273. 

  273. +console=earlycon=uart8250,mmio32,0x11002000 console=ttyS0
    274. 

  274. +bootargs=root=/dev/fit0 rootwait
    275. 

  275. +bootcmd=if pstore check ; then run boot_recovery ; else run boot_emmc ; fi
    276. 

  276. +bootconf=config-1
    277. 

  277. +bootdelay=0
    278. 

  278. +bootfile=openwrt-mediatek-filogic-jdcloud_re-cp-03-initramfs-recovery.itb
    279. 

  279. +bootfile_bl2=openwrt-mediatek-filogic-jdcloud_re-cp-03-preloader.bin
    280. 

  280. +bootfile_fip=openwrt-mediatek-filogic-jdcloud_re-cp-03-bl31-uboot.fip
    281. 

  281. +bootfile_upg=openwrt-mediatek-filogic-jdcloud_re-cp-03-squashfs-sysupgrade.itb
    282. 

  282. +bootled_pwr=red:status
    283. 

  283. +bootled_rec=blue:status
    284. 

  284. +bootmenu_confirm_return=askenv - Press ENTER to return to menu ; bootmenu 60
    285. 

  285. +bootmenu_default=0
    286. 

  286. +bootmenu_delay=0
    287. 

  287. +bootmenu_title=      ( ( ( OpenWrt ) ) )
    288. 

  288. +bootmenu_0=Initialize environment.=run _firstboot
    289. 

  289. +bootmenu_0d=Run default boot command.=run boot_default
    290. 

  290. +bootmenu_1=Boot system via TFTP.=run boot_tftp ; run bootmenu_confirm_return
    291. 

  291. +bootmenu_2=Boot production system from eMMC.=run boot_production ; run bootmenu_confirm_return
    292. 

  292. +bootmenu_3=Boot recovery system from eMMC.=run boot_recovery ; run bootmenu_confirm_return
    293. 

  293. +bootmenu_4=Load production system via TFTP then write to eMMC.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_production ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return
    294. 

  294. +bootmenu_5=Load recovery system via TFTP then write to eMMC.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_recovery ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return
    295. 

  295. +bootmenu_6=Load BL31+U-Boot FIP via TFTP then write to eMMC.=run boot_tftp_write_fip ; run bootmenu_confirm_return
    296. 

  296. +bootmenu_7=Load BL2 preloader via TFTP then write to eMMC.=run boot_tftp_write_bl2 ; run bootmenu_confirm_return
    297. 

  297. +bootmenu_8=Reboot.=reset
    298. 

  298. +bootmenu_9=Reset all settings to factory defaults.=run reset_factory ; reset
    299. 

  299. +boot_first=if button reset ; then led $bootled_rec on ; run boot_tftp_recovery ; setenv flag_recover 1 ; run boot_default ; fi ; bootmenu
    300. 

  300. +boot_default=if env exists flag_recover ; then else run bootcmd ; fi ; run boot_recovery ; setenv replacevol 1 ; run boot_tftp_forever
    301. 

  301. +boot_production=led $bootled_pwr on ; run emmc_read_production && bootm $loadaddr#$bootconf ; led $bootled_pwr off
    302. 

  302. +boot_recovery=led $bootled_rec on ; run emmc_read_recovery && bootm $loadaddr#$bootconf ; led $bootled_rec off
    303. 

  303. +boot_emmc=run boot_production ; run boot_recovery
    304. 

  304. +boot_tftp_forever=led $bootled_rec on ; while true ; do run boot_tftp_recovery ; sleep 1 ; done
    305. 

  305. +boot_tftp_production=tftpboot $loadaddr $bootfile_upg && env exists replacevol && iminfo $loadaddr && run emmc_write_production ; if env exists noboot ; then else bootm $loadaddr#$bootconf ; fi
    306. 

  306. +boot_tftp_recovery=tftpboot $loadaddr $bootfile && env exists replacevol && iminfo $loadaddr && run emmc_write_recovery ; if env exists noboot ; then else bootm $loadaddr#$bootconf ; fi
    307. 

  307. +boot_tftp_write_fip=tftpboot $loadaddr $bootfile_fip && run emmc_write_fip
    308. 

  308. +boot_tftp_write_bl2=tftpboot $loadaddr $bootfile_bl2 && run emmc_write_bl2
    309. 

  309. +boot_tftp=tftpboot $loadaddr $bootfile && bootm $loadaddr#$bootconf
    310. 

  310. +mmc_write_vol=imszb $loadaddr image_size && test 0x$image_size -le 0x$part_size && mmc erase 0x$part_addr 0x$image_size && mmc write $loadaddr 0x$part_addr 0x$image_size
    311. 

  311. +mmc_read_vol=mmc read $loadaddr $part_addr 0x100 && imszb $loadaddr image_size && test 0x$image_size -le 0x$part_size && mmc read $loadaddr 0x$part_addr 0x$image_size && setexpr filesize $image_size * 0x200
    312. 

  312. +part_default=production
    313. 

  313. +part_recovery=recovery
    314. 

  314. +reset_factory=eraseenv && reset
    315. 

  315. +emmc_read_production=part start mmc 0 $part_default part_addr && part size mmc 0 $part_default part_size && run mmc_read_vol
    316. 

  316. +emmc_read_recovery=part start mmc 0 $part_recovery part_addr && part size mmc 0 $part_recovery part_size && run mmc_read_vol
    317. 

  317. +emmc_write_bl2=mmc partconf 0 1 1 1 && mmc erase 0x0 0x400 && mmc write $fileaddr 0x0 0x400 ; mmc partconf 0 1 1 0
    318. 

  318. +emmc_write_fip=mmc erase 0x3400 0x2000 && mmc write $fileaddr 0x3400 0x2000 && mmc erase 0x2000 0x800
    319. 

  319. +emmc_write_production=part start mmc 0 $part_default part_addr && part size mmc 0 $part_default part_size && run mmc_write_vol
    320. 

  320. +emmc_write_recovery=part start mmc 0 $part_recovery part_addr && part size mmc 0 $part_recovery part_size && run mmc_write_vol
    321. 

  321. +_init_env=setenv _init_env ; setenv _create_env ; saveenv ; saveenv
    322. 

  322. +_firstboot=setenv _firstboot ; run _switch_to_menu ; run _init_env ; run boot_first
    323. 

  323. +_switch_to_menu=setenv _switch_to_menu ; setenv bootdelay 3 ; setenv bootmenu_delay 3 ; setenv bootmenu_0 $bootmenu_0d ; setenv bootmenu_0d ; run _bootmenu_update_title
    324. 

  324. +_bootmenu_update_title=setenv _bootmenu_update_title ; setenv bootmenu_title "$bootmenu_title       $ver"
    325.