702-dts-ipq4019-add-PHY-switch-nodes.patch 1.3 KB

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  1. From 9deeec35dd3b628b95624e41d4e04acf728991ba Mon Sep 17 00:00:00 2001
  2. From: Christian Lamparter <[email protected]>
  3. Date: Sun, 20 Nov 2016 02:20:54 +0100
  4. Subject: [PATCH] dts: ipq4019: add PHY/switch nodes
  5. This patch adds both the "qcom,ess-switch" and "qcom,ess-psgmii"
  6. nodes which are needed for the ar40xx.c driver to initialize the
  7. switch.
  8. Signed-off-by: Christian Lamparter <[email protected]>
  9. ---
  10. arch/arm/boot/dts/qcom-ipq4019.dtsi | 23 +++++++++++++++++++++++
  11. 1 file changed, 23 insertions(+)
  12. --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
  13. +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
  14. @@ -621,6 +621,29 @@
  15. };
  16. };
  17. + ess-switch@c000000 {
  18. + compatible = "qcom,ess-switch";
  19. + reg = <0xc000000 0x80000>;
  20. + switch_access_mode = "local bus";
  21. + resets = <&gcc ESS_RESET>;
  22. + reset-names = "ess_rst";
  23. + clocks = <&gcc GCC_ESS_CLK>;
  24. + clock-names = "ess_clk";
  25. + switch_cpu_bmp = <0x1>;
  26. + switch_lan_bmp = <0x1e>;
  27. + switch_wan_bmp = <0x20>;
  28. + switch_mac_mode = <0>; /* PORT_WRAPPER_PSGMII */
  29. + switch_initvlas = <0x7c 0x54>;
  30. + status = "disabled";
  31. + };
  32. +
  33. + ess-psgmii@98000 {
  34. + compatible = "qcom,ess-psgmii";
  35. + reg = <0x98000 0x800>;
  36. + psgmii_access_mode = "local bus";
  37. + status = "disabled";
  38. + };
  39. +
  40. usb3_ss_phy: ssphy@9a000 {
  41. compatible = "qcom,usb-ss-ipq4019-phy";
  42. #phy-cells = <0>;