ath79.dtsi 1.3 KB

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  1. / {
  2. #address-cells = <1>;
  3. #size-cells = <1>;
  4. cpuintc: interrupt-controller {
  5. compatible = "qca,ar7100-cpu-intc";
  6. interrupt-controller;
  7. #interrupt-cells = <1>;
  8. };
  9. ahb {
  10. compatible = "simple-bus";
  11. ranges;
  12. #address-cells = <1>;
  13. #size-cells = <1>;
  14. interrupt-parent = <&cpuintc>;
  15. apb {
  16. compatible = "simple-bus";
  17. ranges;
  18. #address-cells = <1>;
  19. #size-cells = <1>;
  20. interrupt-parent = <&miscintc>;
  21. miscintc: interrupt-controller@18060010 {
  22. compatible = "qca,ar7240-misc-intc";
  23. reg = <0x18060010 0x4>;
  24. interrupt-parent = <&cpuintc>;
  25. interrupts = <6>;
  26. interrupt-controller;
  27. #interrupt-cells = <1>;
  28. };
  29. };
  30. eth0: eth@19000000 {
  31. status = "disabled";
  32. compatible = "qca,ath79-eth", "syscon";
  33. reg = <0x19000000 0x200>;
  34. interrupts = <4>;
  35. phy-mode = "mii";
  36. mdio0: mdio-bus {
  37. status = "disabled";
  38. regmap = <&eth0>;
  39. clocks = <&pll ATH79_CLK_MDIO>;
  40. clock-names = "ref";
  41. };
  42. };
  43. eth1: eth@1a000000 {
  44. status = "disabled";
  45. compatible = "qca,ath79-eth", "syscon";
  46. reg = <0x1a000000 0x200>;
  47. interrupts = <5>;
  48. phy-mode = "mii";
  49. mdio1: mdio-bus {
  50. status = "disabled";
  51. regmap = <&eth1>;
  52. clocks = <&pll ATH79_CLK_MDIO>;
  53. clock-names = "ref";
  54. };
  55. };
  56. };
  57. };