864-07-dts-ipq4019-ap-dk01.1-c1-add-spi-and-ram-nodes.patch 2.0 KB

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  1. --- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1-c1.dts
  2. +++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1-c1.dts
  3. @@ -19,4 +19,112 @@
  4. / {
  5. model = "Qualcomm Technologies, Inc. IPQ40xx/AP-DK01.1-C1";
  6. + memory {
  7. + device_type = "memory";
  8. + reg = <0x80000000 0x10000000>;
  9. + };
  10. +
  11. + reserved-memory {
  12. + #address-cells = <0x1>;
  13. + #size-cells = <0x1>;
  14. + ranges;
  15. +
  16. + apps_bl@87000000 {
  17. + reg = <0x87000000 0x400000>;
  18. + no-map;
  19. + };
  20. +
  21. + sbl@87400000 {
  22. + reg = <0x87400000 0x100000>;
  23. + no-map;
  24. + };
  25. +
  26. + cnss_debug@87500000 {
  27. + reg = <0x87500000 0x600000>;
  28. + no-map;
  29. + };
  30. +
  31. + cpu_context_dump@87b00000 {
  32. + reg = <0x87b00000 0x080000>;
  33. + no-map;
  34. + };
  35. +
  36. + tz_apps@87b80000 {
  37. + reg = <0x87b80000 0x280000>;
  38. + no-map;
  39. + };
  40. +
  41. + smem@87e00000 {
  42. + reg = <0x87e00000 0x080000>;
  43. + no-map;
  44. + };
  45. +
  46. + tz@87e80000 {
  47. + reg = <0x87e80000 0x180000>;
  48. + no-map;
  49. + };
  50. + };
  51. +};
  52. +
  53. +&spi_0 {
  54. + mx25l25635f@0 {
  55. + compatible = "mx25l25635f", "jedec,spi-nor";
  56. + #address-cells = <1>;
  57. + #size-cells = <1>;
  58. + reg = <0>;
  59. + spi-max-frequency = <24000000>;
  60. +
  61. + SBL1@0 {
  62. + label = "SBL1";
  63. + reg = <0x0 0x40000>;
  64. + read-only;
  65. + };
  66. + MIBIB@40000 {
  67. + label = "MIBIB";
  68. + reg = <0x40000 0x20000>;
  69. + read-only;
  70. + };
  71. + QSEE@60000 {
  72. + label = "QSEE";
  73. + reg = <0x60000 0x60000>;
  74. + read-only;
  75. + };
  76. + CDT@c0000 {
  77. + label = "CDT";
  78. + reg = <0xc0000 0x10000>;
  79. + read-only;
  80. + };
  81. + DDRPARAMS@d0000 {
  82. + label = "DDRPARAMS";
  83. + reg = <0xd0000 0x10000>;
  84. + read-only;
  85. + };
  86. + APPSBLENV@e0000 {
  87. + label = "APPSBLENV";
  88. + reg = <0xe0000 0x10000>;
  89. + read-only;
  90. + };
  91. + APPSBL@f0000 {
  92. + label = "APPSBL";
  93. + reg = <0xf0000 0x80000>;
  94. + read-only;
  95. + };
  96. + ART@170000 {
  97. + label = "ART";
  98. + reg = <0x170000 0x10000>;
  99. + read-only;
  100. + };
  101. + kernel@180000 {
  102. + label = "kernel";
  103. + reg = <0x180000 0x400000>;
  104. + };
  105. + rootfs@580000 {
  106. + label = "rootfs";
  107. + reg = <0x580000 0x1600000>;
  108. + };
  109. + firmware@180000 {
  110. + label = "firmware";
  111. + reg = <0x180000 0x1a00000>;
  112. + };
  113. + };
  114. };