101-01-arm-mediatek-retrieve-ram_base-from-dts-node-for-arm.patch 6.9 KB

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  1. From 63336ec7fd7d480ac58a91f3b20d08bf1b3a13ad Mon Sep 17 00:00:00 2001
  2. From: Weijie Gao <[email protected]>
  3. Date: Wed, 19 Jul 2023 17:15:41 +0800
  4. Subject: [PATCH 01/29] arm: mediatek: retrieve ram_base from dts node for
  5. armv8 platform
  6. Now we use fdtdec_setup_mem_size_base() to get DRAM base from fdt ram node
  7. and update gd->ram_base. CFG_SYS_SDRAM_BASE is unused and will be removed.
  8. Also, since mt7622 always passes fdt to linux kernel, there's no need to
  9. assign value to gd->bd->bi_boot_params.
  10. Signed-off-by: Weijie Gao <[email protected]>
  11. ---
  12. arch/arm/dts/mt7981-emmc-rfb.dts | 5 +++++
  13. arch/arm/dts/mt7981-rfb.dts | 5 +++++
  14. arch/arm/dts/mt7981-sd-rfb.dts | 5 +++++
  15. arch/arm/dts/mt7986a-bpi-r3-sd.dts | 5 +++++
  16. arch/arm/dts/mt7986a-rfb.dts | 5 +++++
  17. arch/arm/dts/mt7986a-sd-rfb.dts | 5 +++++
  18. arch/arm/dts/mt7986b-rfb.dts | 5 +++++
  19. arch/arm/dts/mt7986b-sd-rfb.dts | 5 +++++
  20. arch/arm/mach-mediatek/mt7622/init.c | 13 +++++++++----
  21. arch/arm/mach-mediatek/mt7981/init.c | 11 +++++++++--
  22. arch/arm/mach-mediatek/mt7986/init.c | 11 +++++++++--
  23. board/mediatek/mt7622/mt7622_rfb.c | 1 -
  24. include/configs/mt7622.h | 10 ----------
  25. include/configs/mt7981.h | 9 ---------
  26. include/configs/mt7986.h | 9 ---------
  27. 15 files changed, 67 insertions(+), 37 deletions(-)
  28. --- a/arch/arm/dts/mt7981-emmc-rfb.dts
  29. +++ b/arch/arm/dts/mt7981-emmc-rfb.dts
  30. @@ -18,6 +18,11 @@
  31. tick-timer = &timer0;
  32. };
  33. + memory@40000000 {
  34. + device_type = "memory";
  35. + reg = <0x40000000 0x10000000>;
  36. + };
  37. +
  38. reg_3p3v: regulator-3p3v {
  39. compatible = "regulator-fixed";
  40. regulator-name = "fixed-3.3V";
  41. --- a/arch/arm/dts/mt7981-rfb.dts
  42. +++ b/arch/arm/dts/mt7981-rfb.dts
  43. @@ -17,6 +17,11 @@
  44. stdout-path = &uart0;
  45. tick-timer = &timer0;
  46. };
  47. +
  48. + memory@40000000 {
  49. + device_type = "memory";
  50. + reg = <0x40000000 0x10000000>;
  51. + };
  52. };
  53. &uart0 {
  54. --- a/arch/arm/dts/mt7981-sd-rfb.dts
  55. +++ b/arch/arm/dts/mt7981-sd-rfb.dts
  56. @@ -18,6 +18,11 @@
  57. tick-timer = &timer0;
  58. };
  59. + memory@40000000 {
  60. + device_type = "memory";
  61. + reg = <0x40000000 0x10000000>;
  62. + };
  63. +
  64. reg_3p3v: regulator-3p3v {
  65. compatible = "regulator-fixed";
  66. regulator-name = "fixed-3.3V";
  67. --- a/arch/arm/dts/mt7986a-bpi-r3-sd.dts
  68. +++ b/arch/arm/dts/mt7986a-bpi-r3-sd.dts
  69. @@ -19,6 +19,11 @@
  70. tick-timer = &timer0;
  71. };
  72. + memory@40000000 {
  73. + device_type = "memory";
  74. + reg = <0x40000000 0x80000000>;
  75. + };
  76. +
  77. reg_3p3v: regulator-3p3v {
  78. compatible = "regulator-fixed";
  79. regulator-name = "fixed-3.3V";
  80. --- a/arch/arm/dts/mt7986a-rfb.dts
  81. +++ b/arch/arm/dts/mt7986a-rfb.dts
  82. @@ -18,6 +18,11 @@
  83. tick-timer = &timer0;
  84. };
  85. + memory@40000000 {
  86. + device_type = "memory";
  87. + reg = <0x40000000 0x10000000>;
  88. + };
  89. +
  90. reg_1p8v: regulator-1p8v {
  91. compatible = "regulator-fixed";
  92. regulator-name = "fixed-1.8V";
  93. --- a/arch/arm/dts/mt7986a-sd-rfb.dts
  94. +++ b/arch/arm/dts/mt7986a-sd-rfb.dts
  95. @@ -19,6 +19,11 @@
  96. tick-timer = &timer0;
  97. };
  98. + memory@40000000 {
  99. + device_type = "memory";
  100. + reg = <0x40000000 0x10000000>;
  101. + };
  102. +
  103. reg_3p3v: regulator-3p3v {
  104. compatible = "regulator-fixed";
  105. regulator-name = "fixed-3.3V";
  106. --- a/arch/arm/dts/mt7986b-rfb.dts
  107. +++ b/arch/arm/dts/mt7986b-rfb.dts
  108. @@ -18,6 +18,11 @@
  109. tick-timer = &timer0;
  110. };
  111. + memory@40000000 {
  112. + device_type = "memory";
  113. + reg = <0x40000000 0x10000000>;
  114. + };
  115. +
  116. reg_3p3v: regulator-3p3v {
  117. compatible = "regulator-fixed";
  118. regulator-name = "fixed-3.3V";
  119. --- a/arch/arm/dts/mt7986b-sd-rfb.dts
  120. +++ b/arch/arm/dts/mt7986b-sd-rfb.dts
  121. @@ -19,6 +19,11 @@
  122. tick-timer = &timer0;
  123. };
  124. + memory@40000000 {
  125. + device_type = "memory";
  126. + reg = <0x40000000 0x10000000>;
  127. + };
  128. +
  129. reg_3p3v: regulator-3p3v {
  130. compatible = "regulator-fixed";
  131. regulator-name = "fixed-3.3V";
  132. --- a/arch/arm/mach-mediatek/mt7622/init.c
  133. +++ b/arch/arm/mach-mediatek/mt7622/init.c
  134. @@ -4,11 +4,14 @@
  135. * Author: Sam Shih <[email protected]>
  136. */
  137. -#include <common.h>
  138. #include <fdtdec.h>
  139. #include <init.h>
  140. #include <asm/armv8/mmu.h>
  141. -#include <asm/cache.h>
  142. +#include <asm/global_data.h>
  143. +#include <asm/u-boot.h>
  144. +#include <linux/sizes.h>
  145. +
  146. +DECLARE_GLOBAL_DATA_PTR;
  147. int print_cpuinfo(void)
  148. {
  149. @@ -20,11 +23,13 @@ int dram_init(void)
  150. {
  151. int ret;
  152. - ret = fdtdec_setup_memory_banksize();
  153. + ret = fdtdec_setup_mem_size_base();
  154. if (ret)
  155. return ret;
  156. - return fdtdec_setup_mem_size_base();
  157. + gd->ram_size = get_ram_size((void *)gd->ram_base, SZ_2G);
  158. +
  159. + return 0;
  160. }
  161. void reset_cpu(void)
  162. --- a/arch/arm/mach-mediatek/mt7981/init.c
  163. +++ b/arch/arm/mach-mediatek/mt7981/init.c
  164. @@ -4,18 +4,25 @@
  165. * Author: Sam Shih <[email protected]>
  166. */
  167. -#include <cpu_func.h>
  168. +#include <fdtdec.h>
  169. #include <init.h>
  170. #include <asm/armv8/mmu.h>
  171. #include <asm/system.h>
  172. #include <asm/global_data.h>
  173. +#include <asm/u-boot.h>
  174. #include <linux/sizes.h>
  175. DECLARE_GLOBAL_DATA_PTR;
  176. int dram_init(void)
  177. {
  178. - gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE, SZ_2G);
  179. + int ret;
  180. +
  181. + ret = fdtdec_setup_mem_size_base();
  182. + if (ret)
  183. + return ret;
  184. +
  185. + gd->ram_size = get_ram_size((void *)gd->ram_base, SZ_1G);
  186. return 0;
  187. }
  188. --- a/arch/arm/mach-mediatek/mt7986/init.c
  189. +++ b/arch/arm/mach-mediatek/mt7986/init.c
  190. @@ -4,18 +4,25 @@
  191. * Author: Sam Shih <[email protected]>
  192. */
  193. -#include <cpu_func.h>
  194. +#include <fdtdec.h>
  195. #include <init.h>
  196. #include <asm/armv8/mmu.h>
  197. #include <asm/system.h>
  198. #include <asm/global_data.h>
  199. +#include <asm/u-boot.h>
  200. #include <linux/sizes.h>
  201. DECLARE_GLOBAL_DATA_PTR;
  202. int dram_init(void)
  203. {
  204. - gd->ram_size = get_ram_size((void *)CFG_SYS_SDRAM_BASE, SZ_2G);
  205. + int ret;
  206. +
  207. + ret = fdtdec_setup_mem_size_base();
  208. + if (ret)
  209. + return ret;
  210. +
  211. + gd->ram_size = get_ram_size((void *)gd->ram_base, SZ_2G);
  212. return 0;
  213. }
  214. --- a/board/mediatek/mt7622/mt7622_rfb.c
  215. +++ b/board/mediatek/mt7622/mt7622_rfb.c
  216. @@ -19,7 +19,6 @@ DECLARE_GLOBAL_DATA_PTR;
  217. int board_init(void)
  218. {
  219. - gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
  220. return 0;
  221. }
  222. --- a/include/configs/mt7622.h
  223. +++ b/include/configs/mt7622.h
  224. @@ -9,14 +9,4 @@
  225. #ifndef __MT7622_H
  226. #define __MT7622_H
  227. -/* Uboot definition */
  228. -#define CFG_SYS_UBOOT_BASE CONFIG_TEXT_BASE
  229. -
  230. -/* SPL -> Uboot */
  231. -#define CFG_SYS_UBOOT_START CONFIG_TEXT_BASE
  232. -/* DRAM */
  233. -#define CFG_SYS_SDRAM_BASE 0x40000000
  234. -
  235. -/* Ethernet */
  236. -
  237. #endif
  238. --- a/include/configs/mt7981.h
  239. +++ b/include/configs/mt7981.h
  240. @@ -9,13 +9,4 @@
  241. #ifndef __MT7981_H
  242. #define __MT7981_H
  243. -/* Uboot definition */
  244. -#define CFG_SYS_UBOOT_BASE CONFIG_TEXT_BASE
  245. -
  246. -/* SPL -> Uboot */
  247. -#define CFG_SYS_UBOOT_START CONFIG_TEXT_BASE
  248. -
  249. -/* DRAM */
  250. -#define CFG_SYS_SDRAM_BASE 0x40000000
  251. -
  252. #endif
  253. --- a/include/configs/mt7986.h
  254. +++ b/include/configs/mt7986.h
  255. @@ -9,13 +9,4 @@
  256. #ifndef __MT7986_H
  257. #define __MT7986_H
  258. -/* Uboot definition */
  259. -#define CFG_SYS_UBOOT_BASE CONFIG_TEXT_BASE
  260. -
  261. -/* SPL -> Uboot */
  262. -#define CFG_SYS_UBOOT_START CONFIG_TEXT_BASE
  263. -
  264. -/* DRAM */
  265. -#define CFG_SYS_SDRAM_BASE 0x40000000
  266. -
  267. #endif