101-23-arm-dts-mediatek-add-infracfg-registers-to-support-G.patch 1004 B

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  1. From 64dab5fc8405005a78bdf1e0035d8b754cdf0c7e Mon Sep 17 00:00:00 2001
  2. From: Weijie Gao <[email protected]>
  3. Date: Wed, 19 Jul 2023 17:17:27 +0800
  4. Subject: [PATCH 23/29] arm: dts: mediatek: add infracfg registers to support
  5. GMAC/USB3 Co-PHY
  6. This patch adds infracfg to eth node to support enabling GMAC2.
  7. Signed-off-by: Weijie Gao <[email protected]>
  8. ---
  9. arch/arm/dts/mt7981.dtsi | 7 +++++++
  10. 1 file changed, 7 insertions(+)
  11. --- a/arch/arm/dts/mt7981.dtsi
  12. +++ b/arch/arm/dts/mt7981.dtsi
  13. @@ -266,6 +266,7 @@
  14. reset-names = "fe";
  15. mediatek,ethsys = <&ethsys>;
  16. mediatek,sgmiisys = <&sgmiisys0>;
  17. + mediatek,infracfg = <&topmisc>;
  18. #address-cells = <1>;
  19. #size-cells = <0>;
  20. status = "disabled";
  21. @@ -284,6 +285,12 @@
  22. #clock-cells = <1>;
  23. };
  24. + topmisc: topmisc@11d10000 {
  25. + compatible = "mediatek,mt7981-topmisc", "syscon";
  26. + reg = <0x11d10000 0x10000>;
  27. + #clock-cells = <1>;
  28. + };
  29. +
  30. spi0: spi@1100a000 {
  31. compatible = "mediatek,ipm-spi";
  32. reg = <0x1100a000 0x100>;