0128-cpufreq-qcom-nvmem-add-support-for-IPQ8074.patch 3.0 KB

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  1. From 813f2b5ad002e691b92154037f154b4444eedd54 Mon Sep 17 00:00:00 2001
  2. From: Robert Marko <[email protected]>
  3. Date: Sat, 31 Dec 2022 13:03:41 +0100
  4. Subject: [PATCH] cpufreq: qcom-nvmem: add support for IPQ8074
  5. IPQ8074 comes in 2 families:
  6. * IPQ8070A/IPQ8071A (Acorn) up to 1.4GHz
  7. * IPQ8072A/IPQ8074A/IPQ8076A/IPQ8078A (Hawkeye) up to 2.2GHz
  8. So, in order to be able to share one OPP table lets add support for IPQ8074
  9. family based of SMEM SoC ID-s as speedbin fuse is always 0 on IPQ8074.
  10. IPQ8074 compatible is blacklisted from DT platdev as the cpufreq device
  11. will get created by NVMEM CPUFreq driver.
  12. Signed-off-by: Robert Marko <[email protected]>
  13. ---
  14. drivers/cpufreq/cpufreq-dt-platdev.c | 1 +
  15. drivers/cpufreq/qcom-cpufreq-nvmem.c | 39 ++++++++++++++++++++++++++++
  16. 2 files changed, 40 insertions(+)
  17. --- a/drivers/cpufreq/cpufreq-dt-platdev.c
  18. +++ b/drivers/cpufreq/cpufreq-dt-platdev.c
  19. @@ -159,6 +159,7 @@ static const struct of_device_id blockli
  20. { .compatible = "ti,omap3", },
  21. { .compatible = "qcom,ipq8064", },
  22. + { .compatible = "qcom,ipq8074", },
  23. { .compatible = "qcom,apq8064", },
  24. { .compatible = "qcom,msm8974", },
  25. { .compatible = "qcom,msm8960", },
  26. --- a/drivers/cpufreq/qcom-cpufreq-nvmem.c
  27. +++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c
  28. @@ -32,6 +32,9 @@
  29. #include <dt-bindings/arm/qcom,ids.h>
  30. +#define IPQ8074_HAWKEYE_VERSION BIT(0)
  31. +#define IPQ8074_ACORN_VERSION BIT(1)
  32. +
  33. struct qcom_cpufreq_drv;
  34. struct qcom_cpufreq_match_data {
  35. @@ -218,6 +221,37 @@ len_error:
  36. return ret;
  37. }
  38. +static int qcom_cpufreq_ipq8074_name_version(struct device *cpu_dev,
  39. + struct nvmem_cell *speedbin_nvmem,
  40. + char **pvs_name,
  41. + struct qcom_cpufreq_drv *drv)
  42. +{
  43. + int msm_id;
  44. + *pvs_name = NULL;
  45. +
  46. + msm_id = qcom_cpufreq_get_msm_id();
  47. + if (msm_id < 0)
  48. + return msm_id;
  49. +
  50. + switch (msm_id) {
  51. + case QCOM_ID_IPQ8070A:
  52. + case QCOM_ID_IPQ8071A:
  53. + drv->versions = IPQ8074_ACORN_VERSION;
  54. + break;
  55. + case QCOM_ID_IPQ8072A:
  56. + case QCOM_ID_IPQ8074A:
  57. + case QCOM_ID_IPQ8076A:
  58. + case QCOM_ID_IPQ8078A:
  59. + drv->versions = IPQ8074_HAWKEYE_VERSION;
  60. + break;
  61. + default:
  62. + BUG();
  63. + break;
  64. + }
  65. +
  66. + return 0;
  67. +}
  68. +
  69. static const struct qcom_cpufreq_match_data match_data_kryo = {
  70. .get_version = qcom_cpufreq_kryo_name_version,
  71. };
  72. @@ -232,6 +266,10 @@ static const struct qcom_cpufreq_match_d
  73. .genpd_names = qcs404_genpd_names,
  74. };
  75. +static const struct qcom_cpufreq_match_data match_data_ipq8074 = {
  76. + .get_version = qcom_cpufreq_ipq8074_name_version,
  77. +};
  78. +
  79. static int qcom_cpufreq_probe(struct platform_device *pdev)
  80. {
  81. struct qcom_cpufreq_drv *drv;
  82. @@ -431,6 +469,7 @@ static const struct of_device_id qcom_cp
  83. { .compatible = "qcom,msm8996", .data = &match_data_kryo },
  84. { .compatible = "qcom,qcs404", .data = &match_data_qcs404 },
  85. { .compatible = "qcom,ipq8064", .data = &match_data_krait },
  86. + { .compatible = "qcom,ipq8074", .data = &match_data_ipq8074 },
  87. { .compatible = "qcom,apq8064", .data = &match_data_krait },
  88. { .compatible = "qcom,msm8974", .data = &match_data_krait },
  89. { .compatible = "qcom,msm8960", .data = &match_data_krait },