mt7629-iptime-a6004mx.dts 5.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /dts-v1/;
  3. #include <dt-bindings/input/input.h>
  4. #include <dt-bindings/leds/common.h>
  5. #include "mt7629.dtsi"
  6. / {
  7. model = "ipTIME A6004MX";
  8. compatible = "iptime,a6004mx", "mediatek,mt7629";
  9. aliases {
  10. led-boot = &led_cpu;
  11. led-failsafe = &led_cpu;
  12. led-running = &led_cpu;
  13. led-upgrade = &led_cpu;
  14. serial0 = &uart0;
  15. };
  16. chosen {
  17. stdout-path = "serial0:115200n8";
  18. bootargs-override = "console=ttyS0,115200n8";
  19. };
  20. leds {
  21. compatible = "gpio-leds";
  22. led_cpu: cpu {
  23. function = LED_FUNCTION_CPU;
  24. color = <LED_COLOR_ID_ORANGE>;
  25. gpios = <&pio 57 GPIO_ACTIVE_LOW>;
  26. };
  27. wlan5g {
  28. label = "orange:wlan5g";
  29. gpios = <&pio 22 GPIO_ACTIVE_LOW>;
  30. // linux,default-trigger = "phy0radio";
  31. };
  32. wlan2g {
  33. label = "orange:wlan2g";
  34. gpios = <&pio 21 GPIO_ACTIVE_LOW>;
  35. // linux,default-trigger = "phy1radio";
  36. };
  37. wan {
  38. function = LED_FUNCTION_WAN;
  39. color = <LED_COLOR_ID_ORANGE>;
  40. gpios = <&pio 12 GPIO_ACTIVE_HIGH>;
  41. };
  42. };
  43. keys {
  44. compatible = "gpio-keys";
  45. reset {
  46. label = "factory";
  47. linux,code = <KEY_RESTART>;
  48. gpios = <&pio 60 GPIO_ACTIVE_LOW>;
  49. };
  50. wps {
  51. label = "wps";
  52. linux,code = <KEY_WPS_BUTTON>;
  53. gpios = <&pio 58 GPIO_ACTIVE_LOW>;
  54. };
  55. };
  56. memory@40000000 {
  57. device_type = "memory";
  58. reg = <0x40000000 0x10000000>;
  59. };
  60. reg_3p3v: regulator-3p3v {
  61. compatible = "regulator-fixed";
  62. regulator-name = "fixed-3.3V";
  63. regulator-min-microvolt = <3300000>;
  64. regulator-max-microvolt = <3300000>;
  65. regulator-boot-on;
  66. regulator-always-on;
  67. };
  68. reg_5v: regulator-5v {
  69. compatible = "regulator-fixed";
  70. regulator-name = "fixed-5V";
  71. regulator-min-microvolt = <5000000>;
  72. regulator-max-microvolt = <5000000>;
  73. regulator-boot-on;
  74. regulator-always-on;
  75. };
  76. };
  77. &eth {
  78. pinctrl-names = "default";
  79. pinctrl-0 = <&eth_pins>;
  80. pinctrl-1 = <&ephy_leds_pins>;
  81. status = "okay";
  82. gmac0: mac@0 {
  83. compatible = "mediatek,eth-mac";
  84. reg = <0>;
  85. phy-mode = "2500base-x";
  86. nvmem-cells = <&macaddr_factory_4 3>;
  87. nvmem-cell-names = "mac-address";
  88. fixed-link {
  89. speed = <2500>;
  90. full-duplex;
  91. pause;
  92. };
  93. };
  94. gmac1: mac@1 {
  95. compatible = "mediatek,eth-mac";
  96. reg = <1>;
  97. phy-mode = "gmii";
  98. phy-handle = <&phy0>;
  99. nvmem-cells = <&macaddr_factory_4 1>;
  100. nvmem-cell-names = "mac-address";
  101. };
  102. mdio: mdio-bus {
  103. #address-cells = <1>;
  104. #size-cells = <0>;
  105. phy0: ethernet-phy@0 {
  106. reg = <0>;
  107. };
  108. switch@2 {
  109. compatible = "mediatek,mt7531";
  110. reg = <2>;
  111. reset-gpios = <&pio 28 0>;
  112. interrupt-controller;
  113. #interrupt-cells = <1>;
  114. interrupt-parent = <&pio>;
  115. interrupts = <6 IRQ_TYPE_LEVEL_HIGH>;
  116. ports {
  117. #address-cells = <1>;
  118. #size-cells = <0>;
  119. port@0 {
  120. reg = <0>;
  121. label = "lan1";
  122. };
  123. port@1 {
  124. reg = <1>;
  125. label = "lan2";
  126. };
  127. port@2 {
  128. reg = <2>;
  129. label = "lan3";
  130. };
  131. port@3 {
  132. reg = <3>;
  133. label = "lan4";
  134. };
  135. port@6 {
  136. reg = <6>;
  137. ethernet = <&gmac0>;
  138. phy-mode = "2500base-x";
  139. fixed-link {
  140. speed = <2500>;
  141. full-duplex;
  142. pause;
  143. };
  144. };
  145. };
  146. };
  147. };
  148. };
  149. &bch {
  150. status = "okay";
  151. };
  152. &snfi {
  153. pinctrl-names = "default";
  154. pinctrl-0 = <&serial_nand_pins>;
  155. status = "okay";
  156. flash@0 {
  157. compatible = "spi-nand";
  158. reg = <0>;
  159. spi-tx-bus-width = <4>;
  160. spi-rx-bus-width = <4>;
  161. nand-ecc-engine = <&snfi>;
  162. mediatek,bmt-v2;
  163. partitions {
  164. compatible = "fixed-partitions";
  165. #address-cells = <1>;
  166. #size-cells = <1>;
  167. partition@0 {
  168. label = "Bootloader";
  169. reg = <0x0 0x100000>;
  170. read-only;
  171. };
  172. partition@100000 {
  173. label = "Config";
  174. reg = <0x100000 0x40000>;
  175. };
  176. partition@140000 {
  177. label = "factory";
  178. reg = <0x140000 0x80000>;
  179. read-only;
  180. nvmem-layout {
  181. compatible = "fixed-layout";
  182. #address-cells = <1>;
  183. #size-cells = <1>;
  184. macaddr_factory_4: macaddr@4 {
  185. compatible = "mac-base";
  186. reg = <0x4 0x6>;
  187. #nvmem-cell-cells = <1>;
  188. };
  189. };
  190. };
  191. partition@1c0000 {
  192. label = "firmware";
  193. reg = <0x1c0000 0x7400000>;
  194. compatible = "denx,fit";
  195. openwrt,fit-offset = <0x800>;
  196. };
  197. };
  198. };
  199. };
  200. &pio {
  201. eth_pins: eth-pins {
  202. mux {
  203. function = "eth";
  204. groups = "mdc_mdio";
  205. };
  206. };
  207. ephy_leds_pins: ephy-leds-pins {
  208. mux {
  209. function = "led";
  210. groups = "ephy_leds";
  211. };
  212. };
  213. /* Serial NAND is shared pin with SPI-NOR */
  214. serial_nand_pins: serial-nand-pins {
  215. mux {
  216. function = "flash";
  217. groups = "snfi";
  218. };
  219. };
  220. uart0_pins: uart0-pins {
  221. mux {
  222. function = "uart";
  223. groups = "uart0_txd_rxd" ;
  224. };
  225. };
  226. watchdog_pins: watchdog-pins {
  227. mux {
  228. function = "watchdog";
  229. groups = "watchdog";
  230. };
  231. };
  232. };
  233. &ssusb {
  234. vusb33-supply = <&reg_3p3v>;
  235. vbus-supply = <&reg_5v>;
  236. status = "okay";
  237. };
  238. &uart0 {
  239. pinctrl-names = "default";
  240. pinctrl-0 = <&uart0_pins>;
  241. status = "okay";
  242. };
  243. &watchdog {
  244. pinctrl-names = "default";
  245. pinctrl-0 = <&watchdog_pins>;
  246. status = "okay";
  247. interrupt-controller;
  248. #interrupt-cells = <1>;
  249. interrupt-parent = <&pio>;
  250. interrupts = <GIC_SPI 0x80 IRQ_TYPE_EDGE_FALLING>;
  251. };