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- From patchwork Tue Apr 26 19:51:36 2022
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- Date: Tue, 26 Apr 2022 20:51:36 +0100
- From: Daniel Golle <[email protected]>
- To: [email protected], [email protected],
- [email protected], [email protected]
- Cc: Rob Herring <[email protected]>,
- Krzysztof Kozlowski <[email protected]>,
- Matthias Brugger <[email protected]>
- Subject: [PATCH] arm64: dts: mediatek: mt7622: fix GICv2 range
- Message-ID: <YmhNSLgp/[email protected]>
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- X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3
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- Errors-To:
- linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org
- With the current range specified for the CPU interface there is an
- error message at boot:
- GIC: GICv2 detected, but range too small and irqchip.gicv2_force_probe not set
- Setting irqchip.gicv2_force_probe=1 in bootargs results in:
- GIC: Aliased GICv2 at 0x0000000010320000, trying to find the canonical range over 128kB
- GIC: Adjusting CPU interface base to 0x000000001032f000
- GIC: Using split EOI/Deactivate mode
- Using the adjusted CPU interface base and 8K size results in only the
- final line remaining and fully working system as well as /proc/interrupts
- showing additional IPI3,4,5,6:
- IPI3: 0 0 CPU stop (for crash dump) interrupts
- IPI4: 0 0 Timer broadcast interrupts
- IPI5: 0 0 IRQ work interrupts
- IPI6: 0 0 CPU wake-up interrupts
- Signed-off-by: Daniel Golle <[email protected]>
- ---
- arch/arm64/boot/dts/mediatek/mt7622.dtsi | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
- --- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
- +++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
- @@ -347,7 +347,7 @@
- #interrupt-cells = <3>;
- interrupt-parent = <&gic>;
- reg = <0 0x10310000 0 0x1000>,
- - <0 0x10320000 0 0x1000>,
- + <0 0x1032f000 0 0x2000>,
- <0 0x10340000 0 0x2000>,
- <0 0x10360000 0 0x2000>;
- };
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