12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849 |
- From 0bb4937b58ab712f158588376dbac97f8e9df68e Mon Sep 17 00:00:00 2001
- From: Balsam CHIHI <[email protected]>
- Date: Tue, 17 Oct 2023 21:05:41 +0200
- Subject: [PATCH] dt-bindings: thermal: mediatek: Add LVTS thermal controller
- definition for mt8192
- MIME-Version: 1.0
- Content-Type: text/plain; charset=UTF-8
- Content-Transfer-Encoding: 8bit
- Add LVTS thermal controller definition for MT8192.
- Signed-off-by: Balsam CHIHI <[email protected]>
- Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
- Acked-by: Krzysztof Kozlowski <[email protected]>
- Signed-off-by: Bernhard Rosenkränzer <[email protected]>
- Reviewed-by: Matthias Brugger <[email protected]>
- Reviewed-by: Alexandre Mergnat <[email protected]>
- Signed-off-by: Daniel Lezcano <[email protected]>
- Link: https://lore.kernel.org/r/[email protected]
- ---
- .../thermal/mediatek,lvts-thermal.h | 19 +++++++++++++++++++
- 1 file changed, 19 insertions(+)
- --- a/include/dt-bindings/thermal/mediatek,lvts-thermal.h
- +++ b/include/dt-bindings/thermal/mediatek,lvts-thermal.h
- @@ -35,4 +35,23 @@
- #define MT8195_AP_CAM0 15
- #define MT8195_AP_CAM1 16
-
- +#define MT8192_MCU_BIG_CPU0 0
- +#define MT8192_MCU_BIG_CPU1 1
- +#define MT8192_MCU_BIG_CPU2 2
- +#define MT8192_MCU_BIG_CPU3 3
- +#define MT8192_MCU_LITTLE_CPU0 4
- +#define MT8192_MCU_LITTLE_CPU1 5
- +#define MT8192_MCU_LITTLE_CPU2 6
- +#define MT8192_MCU_LITTLE_CPU3 7
- +
- +#define MT8192_AP_VPU0 8
- +#define MT8192_AP_VPU1 9
- +#define MT8192_AP_GPU0 10
- +#define MT8192_AP_GPU1 11
- +#define MT8192_AP_INFRA 12
- +#define MT8192_AP_CAM 13
- +#define MT8192_AP_MD0 14
- +#define MT8192_AP_MD1 15
- +#define MT8192_AP_MD2 16
- +
- #endif /* __MEDIATEK_LVTS_DT_H */
|