962-net-ethernet-mediatek-use-QDMA-instead-of-ADMAv2-on-.patch 3.8 KB

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  1. From: Daniel Golle <[email protected]>
  2. Date: Tue, 10 Oct 2023 21:06:43 +0200
  3. Subject: [PATCH net-next 2/2] net: ethernet: mediatek: use QDMA instead of
  4. ADMAv2 on MT7981 and MT7986
  5. ADMA is plagued by RX hangs which can't easily detected and happen upon
  6. receival of a corrupted package.
  7. Use QDMA just like on netsys v1 which is also still present and usable, and
  8. doesn't suffer from that problem.
  9. Co-developed-by: Lorenzo Bianconi <[email protected]>
  10. Signed-off-by: Lorenzo Bianconi <[email protected]>
  11. Signed-off-by: Daniel Golle <[email protected]>
  12. ---
  13. drivers/net/ethernet/mediatek/mtk_eth_soc.c | 46 ++++++++++-----------
  14. 1 file changed, 23 insertions(+), 23 deletions(-)
  15. --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
  16. +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
  17. @@ -113,16 +113,16 @@ static const struct mtk_reg_map mt7986_r
  18. .tx_irq_mask = 0x461c,
  19. .tx_irq_status = 0x4618,
  20. .pdma = {
  21. - .rx_ptr = 0x6100,
  22. - .rx_cnt_cfg = 0x6104,
  23. - .pcrx_ptr = 0x6108,
  24. - .glo_cfg = 0x6204,
  25. - .rst_idx = 0x6208,
  26. - .delay_irq = 0x620c,
  27. - .irq_status = 0x6220,
  28. - .irq_mask = 0x6228,
  29. - .adma_rx_dbg0 = 0x6238,
  30. - .int_grp = 0x6250,
  31. + .rx_ptr = 0x4100,
  32. + .rx_cnt_cfg = 0x4104,
  33. + .pcrx_ptr = 0x4108,
  34. + .glo_cfg = 0x4204,
  35. + .rst_idx = 0x4208,
  36. + .delay_irq = 0x420c,
  37. + .irq_status = 0x4220,
  38. + .irq_mask = 0x4228,
  39. + .adma_rx_dbg0 = 0x4238,
  40. + .int_grp = 0x4250,
  41. },
  42. .qdma = {
  43. .qtx_cfg = 0x4400,
  44. @@ -1249,7 +1249,7 @@ static bool mtk_rx_get_desc(struct mtk_e
  45. rxd->rxd1 = READ_ONCE(dma_rxd->rxd1);
  46. rxd->rxd3 = READ_ONCE(dma_rxd->rxd3);
  47. rxd->rxd4 = READ_ONCE(dma_rxd->rxd4);
  48. - if (mtk_is_netsys_v2_or_greater(eth)) {
  49. + if (mtk_is_netsys_v3_or_greater(eth)) {
  50. rxd->rxd5 = READ_ONCE(dma_rxd->rxd5);
  51. rxd->rxd6 = READ_ONCE(dma_rxd->rxd6);
  52. }
  53. @@ -2201,7 +2201,7 @@ static int mtk_poll_rx(struct napi_struc
  54. break;
  55. /* find out which mac the packet come from. values start at 1 */
  56. - if (mtk_is_netsys_v2_or_greater(eth)) {
  57. + if (mtk_is_netsys_v3_or_greater(eth)) {
  58. u32 val = RX_DMA_GET_SPORT_V2(trxd.rxd5);
  59. switch (val) {
  60. @@ -2313,7 +2313,7 @@ static int mtk_poll_rx(struct napi_struc
  61. skb->dev = netdev;
  62. bytes += skb->len;
  63. - if (mtk_is_netsys_v2_or_greater(eth)) {
  64. + if (mtk_is_netsys_v3_or_greater(eth)) {
  65. reason = FIELD_GET(MTK_RXD5_PPE_CPU_REASON, trxd.rxd5);
  66. hash = trxd.rxd5 & MTK_RXD5_FOE_ENTRY;
  67. if (hash != MTK_RXD5_FOE_ENTRY)
  68. @@ -2863,7 +2863,7 @@ static int mtk_rx_alloc(struct mtk_eth *
  69. rxd->rxd3 = 0;
  70. rxd->rxd4 = 0;
  71. - if (mtk_is_netsys_v2_or_greater(eth)) {
  72. + if (mtk_is_netsys_v3_or_greater(eth)) {
  73. rxd->rxd5 = 0;
  74. rxd->rxd6 = 0;
  75. rxd->rxd7 = 0;
  76. @@ -4072,7 +4072,7 @@ static int mtk_hw_init(struct mtk_eth *e
  77. else
  78. mtk_hw_reset(eth);
  79. - if (mtk_is_netsys_v2_or_greater(eth)) {
  80. + if (mtk_is_netsys_v3_or_greater(eth)) {
  81. /* Set FE to PDMAv2 if necessary */
  82. val = mtk_r32(eth, MTK_FE_GLO_MISC);
  83. mtk_w32(eth, val | BIT(4), MTK_FE_GLO_MISC);
  84. @@ -5435,11 +5435,11 @@ static const struct mtk_soc_data mt7981_
  85. .dma_len_offset = 8,
  86. },
  87. .rx = {
  88. - .desc_size = sizeof(struct mtk_rx_dma_v2),
  89. - .irq_done_mask = MTK_RX_DONE_INT_V2,
  90. + .desc_size = sizeof(struct mtk_rx_dma),
  91. + .irq_done_mask = MTK_RX_DONE_INT,
  92. .dma_l4_valid = RX_DMA_L4_VALID_V2,
  93. - .dma_max_len = MTK_TX_DMA_BUF_LEN_V2,
  94. - .dma_len_offset = 8,
  95. + .dma_max_len = MTK_TX_DMA_BUF_LEN,
  96. + .dma_len_offset = 16,
  97. },
  98. };
  99. @@ -5461,11 +5461,11 @@ static const struct mtk_soc_data mt7986_
  100. .dma_len_offset = 8,
  101. },
  102. .rx = {
  103. - .desc_size = sizeof(struct mtk_rx_dma_v2),
  104. - .irq_done_mask = MTK_RX_DONE_INT_V2,
  105. + .desc_size = sizeof(struct mtk_rx_dma),
  106. + .irq_done_mask = MTK_RX_DONE_INT,
  107. .dma_l4_valid = RX_DMA_L4_VALID_V2,
  108. - .dma_max_len = MTK_TX_DMA_BUF_LEN_V2,
  109. - .dma_len_offset = 8,
  110. + .dma_max_len = MTK_TX_DMA_BUF_LEN,
  111. + .dma_len_offset = 16,
  112. },
  113. };