qcom-ipq4018-ea6350v3.dts 4.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  2. #include "qcom-ipq4019.dtsi"
  3. #include <dt-bindings/gpio/gpio.h>
  4. #include <dt-bindings/input/input.h>
  5. #include <dt-bindings/soc/qcom,tcsr.h>
  6. / {
  7. model = "Linksys EA6350v3";
  8. compatible = "linksys,ea6350v3";
  9. aliases {
  10. led-boot = &power;
  11. led-failsafe = &power;
  12. led-running = &power;
  13. led-upgrade = &power;
  14. };
  15. soc {
  16. rng@22000 {
  17. status = "okay";
  18. };
  19. mdio@90000 {
  20. status = "okay";
  21. };
  22. ess-psgmii@98000 {
  23. status = "okay";
  24. };
  25. tcsr@1949000 {
  26. compatible = "qcom,tcsr";
  27. reg = <0x1949000 0x100>;
  28. qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  29. };
  30. tcsr@194b000 {
  31. compatible = "qcom,tcsr";
  32. reg = <0x194b000 0x100>;
  33. qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  34. };
  35. ess_tcsr@1953000 {
  36. compatible = "qcom,tcsr";
  37. reg = <0x1953000 0x1000>;
  38. qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  39. };
  40. tcsr@1957000 {
  41. compatible = "qcom,tcsr";
  42. reg = <0x1957000 0x100>;
  43. qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  44. };
  45. usb2@60f8800 {
  46. status = "okay";
  47. };
  48. usb3@8af8800 {
  49. status = "okay";
  50. };
  51. crypto@8e3a000 {
  52. status = "okay";
  53. };
  54. watchdog@b017000 {
  55. status = "okay";
  56. };
  57. ess-switch@c000000 {
  58. status = "okay";
  59. };
  60. edma@c080000 {
  61. status = "okay";
  62. };
  63. };
  64. keys {
  65. compatible = "gpio-keys";
  66. reset {
  67. label = "reset";
  68. gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
  69. linux,code = <KEY_RESTART>;
  70. };
  71. wps {
  72. label = "wps";
  73. gpios = <&tlmm 0 GPIO_ACTIVE_LOW>;
  74. linux,code = <KEY_WPS_BUTTON>;
  75. };
  76. };
  77. leds {
  78. compatible = "gpio-leds";
  79. power: status {
  80. label = "EA6350v3:green:status";
  81. gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
  82. };
  83. };
  84. };
  85. &blsp1_uart1 {
  86. pinctrl-0 = <&serial_pins>;
  87. pinctrl-names = "default";
  88. status = "okay";
  89. };
  90. &cryptobam {
  91. status = "okay";
  92. };
  93. &wifi0 {
  94. status = "okay";
  95. qcom,ath10k-calibration-variant = "linksys-ea6350v3";
  96. };
  97. &wifi1 {
  98. status = "okay";
  99. qcom,ath10k-calibration-variant = "linksys-ea6350v3";
  100. };
  101. &blsp_dma {
  102. status = "okay";
  103. };
  104. &tlmm {
  105. serial_pins: serial_pinmux {
  106. mux {
  107. pins = "gpio60", "gpio61";
  108. function = "blsp_uart0";
  109. bias-disable;
  110. };
  111. };
  112. spi_0_pins: spi_0_pinmux {
  113. mux {
  114. function = "blsp_spi0";
  115. pins = "gpio55", "gpio56", "gpio57";
  116. drive-strength = <12>;
  117. bias-disable;
  118. };
  119. mux_cs {
  120. function = "gpio";
  121. pins = "gpio54", "gpio59";
  122. drive-strength = <2>;
  123. bias-disable;
  124. output-high;
  125. };
  126. };
  127. };
  128. &blsp1_spi1 { /* BLSP1 QUP1 */
  129. pinctrl-0 = <&spi_0_pins>;
  130. pinctrl-names = "default";
  131. status = "okay";
  132. cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>,
  133. <&tlmm 59 GPIO_ACTIVE_HIGH>;
  134. flash@0 {
  135. compatible = "jedec,spi-nor";
  136. reg = <0>;
  137. spi-max-frequency = <24000000>;
  138. partitions {
  139. compatible = "fixed-partitions";
  140. #address-cells = <1>;
  141. #size-cells = <1>;
  142. SBL1@0 {
  143. label = "SBL1";
  144. reg = <0x00000000 0x00040000>;
  145. read-only;
  146. };
  147. MBIB@40000 {
  148. label = "MIBIB";
  149. reg = <0x00040000 0x00020000>;
  150. read-only;
  151. };
  152. QSEE@60000 {
  153. label = "QSEE";
  154. reg = <0x00060000 0x00060000>;
  155. read-only;
  156. };
  157. CDT@c0000 {
  158. label = "CDT";
  159. reg = <0x000c0000 0x00010000>;
  160. read-only;
  161. };
  162. APPSBLENV@d0000 {
  163. label = "APPSBLENV";
  164. reg = <0x000d0000 0x00010000>;
  165. read-only;
  166. };
  167. APPSBL@e0000 {
  168. label = "APPSBL"; /* uboot */
  169. reg = <0x000e0000 0x00080000>;
  170. read-only;
  171. };
  172. ART@160000 {
  173. label = "ART";
  174. reg = <0x00160000 0x00010000>;
  175. read-only;
  176. };
  177. u_env@170000 {
  178. label = "u_env";
  179. reg = <0x00170000 0x00020000>;
  180. };
  181. s_env@190000 {
  182. label = "s_env";
  183. reg = <0x00190000 0x00020000>;
  184. };
  185. devinfo@1b0000 {
  186. label = "devinfo";
  187. reg = <0x001b0000 0x00010000>;
  188. };
  189. /* 0x001c0000 - 0x00200000 unused */
  190. };
  191. };
  192. flash@1 {
  193. status = "okay";
  194. compatible = "spi-nand";
  195. reg = <1>;
  196. spi-max-frequency = <24000000>;
  197. partitions {
  198. compatible = "fixed-partitions";
  199. #address-cells = <1>;
  200. #size-cells = <1>;
  201. kernel@0 {
  202. label = "kernel";
  203. reg = <0x00000000 0x02800000>;
  204. };
  205. rootfs@300000 {
  206. label = "rootfs";
  207. reg = <0x00300000 0x02500000>;
  208. };
  209. alt_kernel@2800000 {
  210. label = "alt_kernel";
  211. reg = <0x02800000 0x02800000>;
  212. };
  213. alt_rootfs@2b00000 {
  214. label = "alt_rootfs";
  215. reg = <0x02b00000 0x02500000>;
  216. };
  217. sysdiag@5000000 {
  218. label = "sysdiag";
  219. reg = <0x05000000 0x00100000>;
  220. };
  221. syscfg@5100000 {
  222. label = "syscfg";
  223. reg = <0x05100000 0x02F00000>;
  224. };
  225. /* 0x00000000 - 0x08000000: 128 MiB */
  226. };
  227. };
  228. };
  229. &usb3_ss_phy {
  230. status = "okay";
  231. };
  232. &usb3_hs_phy {
  233. status = "okay";
  234. };
  235. &usb2_hs_phy {
  236. status = "okay";
  237. };