007-v6.3-arm64-dts-mt7986-add-usb-related-device-nodes.patch 3.1 KB

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  1. From 9e8e24ab716098e617195ce29b88e84608bf2108 Mon Sep 17 00:00:00 2001
  2. From: Sam Shih <[email protected]>
  3. Date: Fri, 6 Jan 2023 16:28:42 +0100
  4. Subject: [PATCH 07/19] arm64: dts: mt7986: add usb related device nodes
  5. This patch adds USB support for MT7986.
  6. Signed-off-by: Sam Shih <[email protected]>
  7. Signed-off-by: Frank Wunderlich <[email protected]>
  8. Reviewed-by: Chunfeng Yun <[email protected]>
  9. Link: https://lore.kernel.org/r/[email protected]
  10. Signed-off-by: Matthias Brugger <[email protected]>
  11. ---
  12. arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 8 +++
  13. arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 55 ++++++++++++++++++++
  14. arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts | 8 +++
  15. 3 files changed, 71 insertions(+)
  16. --- a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
  17. +++ b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
  18. @@ -140,6 +140,10 @@
  19. status = "okay";
  20. };
  21. +&ssusb {
  22. + status = "okay";
  23. +};
  24. +
  25. &switch {
  26. ports {
  27. #address-cells = <1>;
  28. @@ -201,6 +205,10 @@
  29. status = "okay";
  30. };
  31. +&usb_phy {
  32. + status = "okay";
  33. +};
  34. +
  35. &wifi {
  36. status = "okay";
  37. pinctrl-names = "default", "dbdc";
  38. --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
  39. +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
  40. @@ -322,6 +322,61 @@
  41. status = "disabled";
  42. };
  43. + ssusb: usb@11200000 {
  44. + compatible = "mediatek,mt7986-xhci",
  45. + "mediatek,mtk-xhci";
  46. + reg = <0 0x11200000 0 0x2e00>,
  47. + <0 0x11203e00 0 0x0100>;
  48. + reg-names = "mac", "ippc";
  49. + interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
  50. + clocks = <&infracfg CLK_INFRA_IUSB_SYS_CK>,
  51. + <&infracfg CLK_INFRA_IUSB_CK>,
  52. + <&infracfg CLK_INFRA_IUSB_133_CK>,
  53. + <&infracfg CLK_INFRA_IUSB_66M_CK>,
  54. + <&topckgen CLK_TOP_U2U3_XHCI_SEL>;
  55. + clock-names = "sys_ck",
  56. + "ref_ck",
  57. + "mcu_ck",
  58. + "dma_ck",
  59. + "xhci_ck";
  60. + phys = <&u2port0 PHY_TYPE_USB2>,
  61. + <&u3port0 PHY_TYPE_USB3>,
  62. + <&u2port1 PHY_TYPE_USB2>;
  63. + status = "disabled";
  64. + };
  65. +
  66. + usb_phy: t-phy@11e10000 {
  67. + compatible = "mediatek,mt7986-tphy",
  68. + "mediatek,generic-tphy-v2";
  69. + #address-cells = <1>;
  70. + #size-cells = <1>;
  71. + ranges = <0 0 0x11e10000 0x1700>;
  72. + status = "disabled";
  73. +
  74. + u2port0: usb-phy@0 {
  75. + reg = <0x0 0x700>;
  76. + clocks = <&topckgen CLK_TOP_DA_U2_REFSEL>,
  77. + <&topckgen CLK_TOP_DA_U2_CK_1P_SEL>;
  78. + clock-names = "ref", "da_ref";
  79. + #phy-cells = <1>;
  80. + };
  81. +
  82. + u3port0: usb-phy@700 {
  83. + reg = <0x700 0x900>;
  84. + clocks = <&topckgen CLK_TOP_USB3_PHY_SEL>;
  85. + clock-names = "ref";
  86. + #phy-cells = <1>;
  87. + };
  88. +
  89. + u2port1: usb-phy@1000 {
  90. + reg = <0x1000 0x700>;
  91. + clocks = <&topckgen CLK_TOP_DA_U2_REFSEL>,
  92. + <&topckgen CLK_TOP_DA_U2_CK_1P_SEL>;
  93. + clock-names = "ref", "da_ref";
  94. + #phy-cells = <1>;
  95. + };
  96. + };
  97. +
  98. ethsys: syscon@15000000 {
  99. #address-cells = <1>;
  100. #size-cells = <1>;
  101. --- a/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts
  102. +++ b/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts
  103. @@ -167,10 +167,18 @@
  104. status = "okay";
  105. };
  106. +&ssusb {
  107. + status = "okay";
  108. +};
  109. +
  110. &uart0 {
  111. status = "okay";
  112. };
  113. +&usb_phy {
  114. + status = "okay";
  115. +};
  116. +
  117. &wifi {
  118. status = "okay";
  119. pinctrl-names = "default", "dbdc";