qcom-ipq4018-emd1.dts 3.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. #include "qcom-ipq4019.dtsi"
  3. #include <dt-bindings/gpio/gpio.h>
  4. #include <dt-bindings/input/input.h>
  5. #include <dt-bindings/leds/common.h>
  6. #include <dt-bindings/soc/qcom,tcsr.h>
  7. / {
  8. model = "EnGenius EMD1";
  9. compatible = "engenius,emd1";
  10. aliases {
  11. led-boot = &led_power;
  12. led-failsafe = &led_power;
  13. led-running = &led_power;
  14. led-upgrade = &led_power;
  15. };
  16. soc {
  17. rng@22000 {
  18. status = "okay";
  19. };
  20. mdio@90000 {
  21. status = "okay";
  22. };
  23. tcsr@1949000 {
  24. compatible = "qcom,tcsr";
  25. reg = <0x1949000 0x100>;
  26. qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  27. };
  28. ess_tcsr@1953000 {
  29. compatible = "qcom,tcsr";
  30. reg = <0x1953000 0x1000>;
  31. qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  32. };
  33. tcsr@1957000 {
  34. compatible = "qcom,tcsr";
  35. reg = <0x1957000 0x100>;
  36. qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  37. };
  38. crypto@8e3a000 {
  39. status = "okay";
  40. };
  41. watchdog@b017000 {
  42. status = "okay";
  43. };
  44. };
  45. keys {
  46. compatible = "gpio-keys";
  47. reset {
  48. label = "reset";
  49. gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
  50. linux,code = <KEY_RESTART>;
  51. };
  52. };
  53. leds {
  54. compatible = "gpio-leds";
  55. led_power: power {
  56. function = LED_FUNCTION_POWER;
  57. color = <LED_COLOR_ID_WHITE>;
  58. gpios = <&tlmm 58 GPIO_ACTIVE_LOW>;
  59. };
  60. wlan2g {
  61. label = "red:wlan2g";
  62. gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
  63. linux,default-trigger = "phy0tpt";
  64. };
  65. wlan5g {
  66. label = "blue:wlan5g";
  67. gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
  68. linux,default-trigger = "phy1tpt";
  69. };
  70. mesh {
  71. label = "orange:mesh";
  72. gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
  73. };
  74. };
  75. };
  76. &tlmm {
  77. serial_pins: serial_pinmux {
  78. mux {
  79. pins = "gpio60", "gpio61";
  80. function = "blsp_uart0";
  81. bias-disable;
  82. };
  83. };
  84. spi_0_pins: spi_0_pinmux {
  85. pin {
  86. function = "blsp_spi0";
  87. pins = "gpio54", "gpio55", "gpio56", "gpio57";
  88. drive-strength = <12>;
  89. bias-disable;
  90. };
  91. pin_cs {
  92. function = "gpio";
  93. pins = "gpio54";
  94. drive-strength = <2>;
  95. bias-disable;
  96. output-high;
  97. };
  98. };
  99. };
  100. &blsp_dma {
  101. status = "okay";
  102. };
  103. &blsp1_spi1 {
  104. pinctrl-0 = <&spi_0_pins>;
  105. pinctrl-names = "default";
  106. status = "okay";
  107. cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
  108. flash@0 {
  109. compatible = "jedec,spi-nor";
  110. reg = <0>;
  111. spi-max-frequency = <24000000>;
  112. partitions {
  113. compatible = "fixed-partitions";
  114. #address-cells = <1>;
  115. #size-cells = <1>;
  116. partition0@0 {
  117. label = "0:SBL1";
  118. reg = <0x00000000 0x00040000>;
  119. read-only;
  120. };
  121. partition1@40000 {
  122. label = "0:MIBIB";
  123. reg = <0x00040000 0x00020000>;
  124. read-only;
  125. };
  126. partition2@60000 {
  127. label = "0:QSEE";
  128. reg = <0x00060000 0x00060000>;
  129. read-only;
  130. };
  131. partition3@c0000 {
  132. label = "0:CDT";
  133. reg = <0x000c0000 0x00010000>;
  134. read-only;
  135. };
  136. partition4@d0000 {
  137. label = "0:DDRPARAMS";
  138. reg = <0x000d0000 0x00010000>;
  139. read-only;
  140. };
  141. partition5@e0000 {
  142. label = "0:APPSBLENV";
  143. reg = <0x000e0000 0x00010000>;
  144. read-only;
  145. };
  146. partition6@f0000 {
  147. label = "0:APPSBL";
  148. reg = <0x000f0000 0x00080000>;
  149. read-only;
  150. };
  151. partition7@170000 {
  152. label = "0:ART";
  153. reg = <0x00170000 0x00010000>;
  154. read-only;
  155. };
  156. partition8@180000 {
  157. label = "userconfig";
  158. reg = <0x00180000 0x00080000>;
  159. read-only;
  160. };
  161. partition9@200000 {
  162. compatible = "denx,fit";
  163. label = "firmware";
  164. reg = <0x200000 0x01e00000>;
  165. };
  166. };
  167. };
  168. };
  169. &blsp1_uart1 {
  170. pinctrl-0 = <&serial_pins>;
  171. pinctrl-names = "default";
  172. status = "okay";
  173. };
  174. &cryptobam {
  175. status = "okay";
  176. };
  177. &wifi0 {
  178. status = "okay";
  179. qcom,ath10k-calibration-variant = "EnGenius-EMD1";
  180. };
  181. &wifi1 {
  182. status = "okay";
  183. qcom,ath10k-calibration-variant = "EnGenius-EMD1";
  184. };