qcom-ipq4018-fritzbox-4040.dts 5.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  2. #include "qcom-ipq4019.dtsi"
  3. #include <dt-bindings/gpio/gpio.h>
  4. #include <dt-bindings/input/input.h>
  5. #include <dt-bindings/leds/common.h>
  6. #include <dt-bindings/soc/qcom,tcsr.h>
  7. / {
  8. model = "AVM FRITZ!Box 4040";
  9. compatible = "avm,fritzbox-4040";
  10. aliases {
  11. led-boot = &power;
  12. led-failsafe = &flash;
  13. led-running = &power;
  14. led-upgrade = &flash;
  15. label-mac-device = &gmac;
  16. };
  17. soc {
  18. rng@22000 {
  19. status = "okay";
  20. };
  21. mdio@90000 {
  22. status = "okay";
  23. };
  24. tcsr@1949000 {
  25. compatible = "qcom,tcsr";
  26. reg = <0x1949000 0x100>;
  27. qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  28. };
  29. tcsr@194b000 {
  30. compatible = "qcom,tcsr";
  31. reg = <0x194b000 0x100>;
  32. qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  33. };
  34. ess_tcsr@1953000 {
  35. compatible = "qcom,tcsr";
  36. reg = <0x1953000 0x1000>;
  37. qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  38. };
  39. tcsr@1957000 {
  40. compatible = "qcom,tcsr";
  41. reg = <0x1957000 0x100>;
  42. qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  43. };
  44. usb2@60f8800 {
  45. status = "okay";
  46. };
  47. usb3@8af8800 {
  48. status = "okay";
  49. };
  50. crypto@8e3a000 {
  51. status = "okay";
  52. };
  53. watchdog@b017000 {
  54. status = "okay";
  55. };
  56. };
  57. keys {
  58. compatible = "gpio-keys";
  59. wlan {
  60. label = "wlan";
  61. gpios = <&tlmm 58 GPIO_ACTIVE_LOW>;
  62. linux,code = <KEY_RFKILL>;
  63. };
  64. wps {
  65. label = "wps";
  66. gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
  67. linux,code = <KEY_WPS_BUTTON>;
  68. };
  69. };
  70. switch-leds {
  71. compatible = "gpio-leds";
  72. wlan {
  73. function = LED_FUNCTION_WLAN;
  74. color = <LED_COLOR_ID_GREEN>;
  75. gpios = <&ethphy0 0 GPIO_ACTIVE_HIGH>;
  76. };
  77. panic: info_red {
  78. label = "red:info";
  79. gpios = <&ethphy0 1 GPIO_ACTIVE_HIGH>;
  80. panic-indicator;
  81. };
  82. wan {
  83. function = LED_FUNCTION_WAN;
  84. color = <LED_COLOR_ID_GREEN>;
  85. gpios = <&ethphy1 0 GPIO_ACTIVE_HIGH>;
  86. };
  87. power: power {
  88. function = LED_FUNCTION_POWER;
  89. color = <LED_COLOR_ID_GREEN>;
  90. gpios = <&ethphy2 1 GPIO_ACTIVE_HIGH>;
  91. };
  92. lan {
  93. function = LED_FUNCTION_LAN;
  94. color = <LED_COLOR_ID_GREEN>;
  95. gpios = <&ethphy3 0 GPIO_ACTIVE_HIGH>;
  96. };
  97. flash: info_amber {
  98. label = "amber:info";
  99. gpios = <&ethphy3 1 GPIO_ACTIVE_HIGH>;
  100. };
  101. };
  102. };
  103. &tlmm {
  104. serial_pins: serial_pinmux {
  105. mux {
  106. pins = "gpio60", "gpio61";
  107. function = "blsp_uart0";
  108. bias-disable;
  109. };
  110. };
  111. spi_0_pins: spi_0_pinmux {
  112. mux {
  113. function = "blsp_spi0";
  114. pins = "gpio55", "gpio56", "gpio57";
  115. drive-strength = <12>;
  116. bias-disable;
  117. };
  118. mux_cs {
  119. function = "gpio";
  120. pins = "gpio54";
  121. drive-strength = <2>;
  122. bias-disable;
  123. output-high;
  124. };
  125. };
  126. };
  127. &cryptobam {
  128. status = "okay";
  129. };
  130. &blsp_dma {
  131. status = "okay";
  132. };
  133. &blsp1_spi1 { /* BLSP1 QUP1 */
  134. pinctrl-0 = <&spi_0_pins>;
  135. pinctrl-names = "default";
  136. status = "okay";
  137. cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
  138. flash@0 {
  139. compatible = "jedec,spi-nor";
  140. reg = <0>;
  141. spi-max-frequency = <24000000>;
  142. status = "okay";
  143. m25p,fast-read;
  144. partitions {
  145. compatible = "fixed-partitions";
  146. #address-cells = <1>;
  147. #size-cells = <1>;
  148. partition0@0 {
  149. label = "SBL1";
  150. reg = <0x00000000 0x00040000>;
  151. read-only;
  152. };
  153. partition1@40000 {
  154. label = "MIBIB";
  155. reg = <0x00040000 0x00020000>;
  156. read-only;
  157. };
  158. partition2@60000 {
  159. label = "QSEE";
  160. reg = <0x00060000 0x00060000>;
  161. read-only;
  162. };
  163. partition3@c0000 {
  164. label = "CDT";
  165. reg = <0x000c0000 0x00010000>;
  166. read-only;
  167. };
  168. partition4@d0000 {
  169. label = "DDRPARAMS";
  170. reg = <0x000d0000 0x00010000>;
  171. read-only;
  172. };
  173. partition5@e0000 {
  174. label = "APPSBLENV"; /* uboot env - empty */
  175. reg = <0x000e0000 0x00010000>;
  176. read-only;
  177. };
  178. partition6@f0000 {
  179. label = "urlader"; /* APPSBL */
  180. reg = <0x000f0000 0x0002dc000>;
  181. read-only;
  182. };
  183. partition7@11dc00 {
  184. /* make a backup of this partition! */
  185. label = "urlader_config";
  186. reg = <0x0011dc00 0x00002400>;
  187. read-only;
  188. };
  189. partition8@120000 {
  190. label = "tffs1";
  191. reg = <0x00120000 0x00080000>;
  192. read-only;
  193. };
  194. partition9@1a0000 {
  195. label = "tffs2";
  196. reg = <0x001a0000 0x00080000>;
  197. read-only;
  198. };
  199. partition10@220000 {
  200. label = "uboot";
  201. reg = <0x00220000 0x00080000>;
  202. read-only;
  203. };
  204. partition11@2A0000 {
  205. compatible = "denx,fit";
  206. label = "firmware";
  207. reg = <0x002a0000 0x01c60000>;
  208. };
  209. partition12@1f00000 {
  210. label = "jffs2";
  211. reg = <0x01f00000 0x00100000>;
  212. };
  213. };
  214. };
  215. };
  216. &blsp1_uart1 {
  217. pinctrl-0 = <&serial_pins>;
  218. pinctrl-names = "default";
  219. status = "okay";
  220. };
  221. &ethphy0 {
  222. gpio-controller;
  223. #gpio-cells = <2>;
  224. };
  225. &ethphy1 {
  226. gpio-controller;
  227. #gpio-cells = <2>;
  228. enable-usb-power {
  229. gpio-hog;
  230. line-name = "enable USB3 power";
  231. gpios = <1 GPIO_ACTIVE_HIGH>;
  232. output-high;
  233. };
  234. };
  235. &ethphy2 {
  236. gpio-controller;
  237. #gpio-cells = <2>;
  238. };
  239. &ethphy3 {
  240. gpio-controller;
  241. #gpio-cells = <2>;
  242. };
  243. &gmac {
  244. status = "okay";
  245. };
  246. &switch {
  247. status = "okay";
  248. };
  249. &swport1 {
  250. status = "okay";
  251. };
  252. &swport2 {
  253. status = "okay";
  254. };
  255. &swport3 {
  256. status = "okay";
  257. };
  258. &swport4 {
  259. status = "okay";
  260. };
  261. &swport5 {
  262. status = "okay";
  263. };
  264. &usb3_ss_phy {
  265. status = "okay";
  266. };
  267. &usb3_hs_phy {
  268. status = "okay";
  269. };
  270. &usb2_hs_phy {
  271. status = "okay";
  272. };
  273. &wifi0 {
  274. status = "okay";
  275. qcom,ath10k-calibration-variant = "AVM-FRITZBox-4040";
  276. };
  277. &wifi1 {
  278. status = "okay";
  279. qcom,ath10k-calibration-variant = "AVM-FRITZBox-4040";
  280. };