openwrt/target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4018-gl-a1300.dts

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT

#include "qcom-ipq4019.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/soc/qcom,tcsr.h>

/ {
	model = "GL.iNet GL-A1300";
	compatible = "glinet,gl-a1300", "qcom,ipq4019";

	aliases {
		led-boot = &led_run;
		led-failsafe = &led_run;
		led-running = &led_run;
		led-upgrade = &led_run;
		label-mac-device = &swport4;
	};

	chosen {
		bootargs-append = " ubi.mtd=ubi root=/dev/ubiblock0_1";
	};

	soc {
		tcsr@1949000 {
			compatible = "qcom,tcsr";
			reg = <0x1949000 0x100>;
			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
		};

		tcsr@194b000 {
			/* select hostmode */
			compatible = "qcom,tcsr";
			reg = <0x194b000 0x100>;
			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
			status = "okay";
		};

		ess_tcsr@1953000 {
			compatible = "qcom,tcsr";
			reg = <0x1953000 0x1000>;
			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
		};

		tcsr@1957000 {
			compatible = "qcom,tcsr";
			reg = <0x1957000 0x100>;
			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
		};
	};

	keys {
		compatible = "gpio-keys";

		reset {
			label = "reset";
			gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_RESTART>;
		};

		switch {
			label = "switch-button";
			gpios = <&tlmm 0 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_SETUP>;
		};
	};

	leds {
		compatible = "gpio-leds";

		led_run: blue {
			function = LED_FUNCTION_STATUS;
			color = <LED_COLOR_ID_BLUE>;
			gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
		};

		white {
			function = LED_FUNCTION_STATUS;
			color = <LED_COLOR_ID_WHITE>;
			gpios = <&tlmm 1 GPIO_ACTIVE_HIGH>;
		};
	};

	gpio_export {
		compatible = "gpio-export";

		usb {
			gpio-export,name = "usb_power";
			gpio-export,output = <1>;
			gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
		};
	};
};

&prng {
	status = "okay";
};

&mdio {
	status = "okay";
};

&blsp_dma {
	status = "okay";
};

&watchdog {
	status = "okay";
};

&crypto {
	status = "okay";
};

&cryptobam {
	status = "okay";
};

&blsp1_spi1 {
	status = "okay";

	pinctrl-0 = <&spi0_pins>;
	pinctrl-names = "default";
	cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 5 GPIO_ACTIVE_HIGH>;

	flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <24000000>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "SBL1";
				reg = <0x00000000 0x00040000>;
				read-only;
			};

			partition@40000 {
				label = "MIBIB";
				reg = <0x00040000 0x00020000>;
				read-only;
			};

			partition@60000 {
				label = "QSEE";
				reg = <0x00060000 0x00060000>;
				read-only;
			};

			partition@c0000 {
				label = "CDT";
				reg = <0x000c0000 0x00010000>;
				read-only;
			};

			partition@d0000 {
				label = "DDRPARAMS";
				reg = <0x000d0000 0x00010000>;
				read-only;
			};

			partition@e0000 {
				label = "APPSBLENV"; /* uboot env*/
				reg = <0x000e0000 0x00010000>;
			};

			partition@f0000 {
				label = "APPSBL"; /* uboot */
				reg = <0x000f0000 0x00080000>;
				read-only;
			};

			partition@170000 {
				label = "ART";
				reg = <0x00170000 0x00010000>;
				read-only;

				nvmem-layout {
					compatible = "fixed-layout";
					#address-cells = <1>;
					#size-cells = <1>;

					macaddr_gmac0: macaddr@0 {
						compatible = "mac-base";
						reg = <0x0 0x6>;
						#nvmem-cell-cells = <1>;
					};

					macaddr_gmac1: macaddr@6 {
						reg = <0x6 0x6>;
					};

					precal_art_1000: precal@1000 {
						reg = <0x1000 0x2f20>;
					};

					precal_art_5000: precal@5000 {
						reg = <0x5000 0x2f20>;
					};
				};
			};

			partition@180000 {
				label = "log";
				reg = <0x00180000 0x00020000>;
			};
		};
	};

	spi-nand@1 {
		compatible = "spi-nand";
		reg = <1>;
		spi-max-frequency = <24000000>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "ubi";
				reg = <0x00000000 0x08000000>;
			};
		};
	};
};

&blsp1_uart1 {
	pinctrl-0 = <&serial_pins>;
	pinctrl-names = "default";
	status = "okay";
};

&tlmm {
	serial_pins: serial_pinmux {
		mux {
			pins = "gpio60", "gpio61";
			function = "blsp_uart0";
			bias-disable;
		};
	};

	i2c_0_pins: i2c_0_pinmux {
		pinmux {
			pins = "gpio58", "gpio59";
			function = "blsp_i2c0";
			bias-disable;
		};
	};

	spi0_pins: spi0_pinmux {
		mux_spi {
			function = "blsp_spi0";
			pins = "gpio55", "gpio56", "gpio57";
			drive-strength = <12>;
			bias-disable;
		};

		mux_cs {
			function = "gpio";
			pins = "gpio54", "gpio5";
			drive-strength = <2>;
			bias-disable;
			output-high;
		};
	};
};

&blsp1_i2c3 {
	status = "okay";
	pinctrl-0 = <&i2c_0_pins>;
	pinctrl-names = "default";
};

&usb2 {
	status = "okay";
};

&usb3 {
	status = "okay";
};

&usb2_hs_phy {
	status = "okay";
};

&usb3_hs_phy {
	status = "okay";
};

&usb3_ss_phy {
	status = "okay";
};

&gmac {
	status = "okay";
};

&switch {
	status = "okay";
};

&swport3 {
	status = "okay";

	label = "lan2";
	nvmem-cell-names = "mac-address";
	nvmem-cells = <&macaddr_gmac0 2>;
};

&swport4 {
	status = "okay";

	label = "lan1";
	nvmem-cell-names = "mac-address";
	nvmem-cells = <&macaddr_gmac0 0>;
};

&swport5 {
	status = "okay";

	nvmem-cell-names = "mac-address";
	nvmem-cells = <&macaddr_gmac1>;
};

&wifi0 {
	status = "okay";
	nvmem-cell-names = "pre-calibration";
	nvmem-cells = <&precal_art_1000>;
	qcom,ath10k-calibration-variant = "GL-A1300";
};

&wifi1 {
	status = "okay";
	nvmem-cell-names = "pre-calibration";
	nvmem-cells = <&precal_art_5000>;
	qcom,ath10k-calibration-variant = "GL-A1300";
};