qcom-ipq4018-whw01.dts 5.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338
  1. // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  2. #include "qcom-ipq4019.dtsi"
  3. #include <dt-bindings/leds/common.h>
  4. #include <dt-bindings/gpio/gpio.h>
  5. #include <dt-bindings/input/input.h>
  6. / {
  7. model = "Linksys WHW01";
  8. compatible = "linksys,whw01";
  9. aliases {
  10. serial0 = &blsp1_uart1;
  11. led-boot = &led_system_blue;
  12. led-running = &led_system_blue;
  13. };
  14. chosen {
  15. stdout-path = "serial0:115200n8";
  16. bootargs-append = " root=/dev/ubiblock0_0";
  17. };
  18. soc {
  19. keys {
  20. compatible = "gpio-keys";
  21. reset {
  22. label = "reset";
  23. gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
  24. linux,code = <KEY_RESTART>;
  25. };
  26. };
  27. ess_tcsr@1953000 {
  28. status = "okay";
  29. };
  30. };
  31. };
  32. &blsp_dma {
  33. status = "okay";
  34. };
  35. &blsp1_i2c3 {
  36. status = "okay";
  37. pinctrl-0 = <&i2c_0_pins>;
  38. pinctrl-1 = <&i2c_0_pins>;
  39. pinctrl-names = "i2c_active", "i2c_sleep";
  40. leds@62 {
  41. compatible = "nxp,pca9633";
  42. #address-cells = <1>;
  43. #size-cells = <0>;
  44. reg = <0x62>;
  45. /* RGB? */
  46. led@0 {
  47. reg = <0>;
  48. color = <LED_COLOR_ID_RED>;
  49. function = LED_FUNCTION_POWER;
  50. };
  51. led@1 {
  52. reg = <1>;
  53. color = <LED_COLOR_ID_GREEN>;
  54. function = LED_FUNCTION_POWER;
  55. };
  56. led_system_blue: led@2 {
  57. reg = <2>;
  58. color = <LED_COLOR_ID_BLUE>;
  59. function = LED_FUNCTION_POWER;
  60. linux,default-trigger = "default-on";
  61. };
  62. };
  63. };
  64. &blsp1_spi1 {
  65. status = "okay";
  66. pinctrl-0 = <&spi_0_pins>;
  67. pinctrl-names = "default";
  68. cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 4 GPIO_ACTIVE_HIGH>;
  69. nor@0 {
  70. reg = <0>;
  71. compatible = "jedec,spi-nor";
  72. spi-max-frequency = <24000000>;
  73. partitions {
  74. compatible = "fixed-partitions";
  75. #address-cells = <1>;
  76. #size-cells = <1>;
  77. partition@0 {
  78. label = "0:SBL1";
  79. reg = <0x0 0x40000>;
  80. read-only;
  81. };
  82. partition@40000 {
  83. label = "0:MIBIB";
  84. reg = <0x40000 0x20000>;
  85. read-only;
  86. };
  87. partition@60000 {
  88. label = "0:QSEE";
  89. reg = <0x60000 0x60000>;
  90. read-only;
  91. };
  92. partition@c0000 {
  93. label = "0:CDT";
  94. reg = <0xc0000 0x10000>;
  95. read-only;
  96. };
  97. partition@d0000 {
  98. label = "APPSBL";
  99. reg = <0xd0000 0xa0000>;
  100. read-only;
  101. };
  102. partition@170000 {
  103. label = "0:ART";
  104. reg = <0x170000 0x10000>;
  105. read-only;
  106. nvmem-layout {
  107. compatible = "fixed-layout";
  108. #address-cells = <1>;
  109. #size-cells = <1>;
  110. precal_art_1000: precal@1000 {
  111. reg = <0x1000 0x2f20>;
  112. };
  113. precal_art_5000: precal@5000 {
  114. reg = <0x5000 0x2f20>;
  115. };
  116. };
  117. };
  118. partition@180000 {
  119. label = "u_env";
  120. reg = <0x180000 0x40000>;
  121. };
  122. partition@1c0000 {
  123. label = "s_env";
  124. reg = <0x1c0000 0x20000>;
  125. };
  126. partition@1e0000 {
  127. label = "devinfo";
  128. reg = <0x1e0000 0x20000>;
  129. read-only;
  130. };
  131. };
  132. };
  133. nand@1 {
  134. reg = <1>;
  135. compatible = "spi-nand";
  136. spi-max-frequency = <24000000>;
  137. partitions {
  138. compatible = "fixed-partitions";
  139. #address-cells = <1>;
  140. #size-cells = <1>;
  141. partition@0 {
  142. label = "kernel";
  143. reg = <0x0000000 0x5000000>;
  144. };
  145. partition@600000 {
  146. label = "rootfs";
  147. reg = <0x0600000 0x4a00000>;
  148. };
  149. partition@5000000 {
  150. label = "alt_kernel";
  151. reg = <0x5000000 0x5000000>;
  152. };
  153. partition@5600000 {
  154. label = "alt_rootfs";
  155. reg = <0x5600000 0x4a00000>;
  156. };
  157. partition@a000000 {
  158. label = "sysdiag";
  159. reg = <0xa000000 0x0200000>;
  160. read-only;
  161. };
  162. partition@a200000 {
  163. label = "syscfg";
  164. reg = <0xa200000 0x5e00000>;
  165. read-only;
  166. };
  167. };
  168. };
  169. };
  170. &blsp1_uart1 {
  171. pinctrl-0 = <&serial_pins>;
  172. pinctrl-names = "default";
  173. status = "okay";
  174. };
  175. &mdio {
  176. status = "okay";
  177. pinctrl-0 = <&mdio_pins>;
  178. pinctrl-names = "default";
  179. phy-reset-gpio = <&tlmm 62 GPIO_ACTIVE_HIGH>;
  180. };
  181. &tlmm {
  182. mdio_pins: mdio_pinmux {
  183. mux_mdio {
  184. pins = "gpio53";
  185. function = "mdio";
  186. bias-pull-up;
  187. };
  188. mux_mdc {
  189. pins = "gpio52";
  190. function = "mdc";
  191. bias-pull-up;
  192. };
  193. };
  194. serial_pins: serial_pinmux {
  195. mux {
  196. pins = "gpio60", "gpio61";
  197. function = "blsp_uart0";
  198. bias-disable;
  199. };
  200. };
  201. spi_0_pins: spi_0_pinmux {
  202. pinmux {
  203. function = "blsp_spi0";
  204. pins = "gpio55", "gpio56", "gpio57";
  205. };
  206. pinmux_cs {
  207. function = "gpio";
  208. pins = "gpio54", "gpio4";
  209. };
  210. pinconf {
  211. pins = "gpio55", "gpio56", "gpio57";
  212. drive-strength = <12>;
  213. bias-disable;
  214. };
  215. pinconf_cs {
  216. pins = "gpio54", "gpio4";
  217. drive-strength = <2>;
  218. bias-disable;
  219. output-high;
  220. };
  221. };
  222. i2c_0_pins: i2c_0_pinmux {
  223. mux {
  224. function = "blsp_i2c0";
  225. pins = "gpio58", "gpio59";
  226. bias-disable;
  227. };
  228. };
  229. reset_pinmux {
  230. mux {
  231. pins = "gpio63";
  232. bias-pull-up;
  233. };
  234. };
  235. };
  236. &usb2 {
  237. status = "okay";
  238. };
  239. &usb2_hs_phy {
  240. status = "okay";
  241. };
  242. &usb3 {
  243. status = "okay";
  244. };
  245. &usb3_hs_phy {
  246. status = "okay";
  247. };
  248. &usb3_ss_phy {
  249. status = "okay";
  250. };
  251. &watchdog {
  252. status = "okay";
  253. };
  254. &wifi0 {
  255. status = "okay";
  256. qcom,ath10k-calibration-variant = "linksys-whw01-v1";
  257. nvmem-cell-names = "pre-calibration";
  258. nvmem-cells = <&precal_art_1000>;
  259. };
  260. &wifi1 {
  261. status = "okay";
  262. qcom,ath10k-calibration-variant = "linksys-whw01-v1";
  263. nvmem-cell-names = "pre-calibration";
  264. nvmem-cells = <&precal_art_5000>;
  265. };
  266. &gmac {
  267. status = "okay";
  268. };
  269. &switch {
  270. status = "okay";
  271. };
  272. &swport4 {
  273. status = "okay";
  274. label = "eth1";
  275. };
  276. &swport5 {
  277. status = "okay";
  278. label = "eth2";
  279. };