qcom-ipq4018-wr-1.dts 4.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  2. #include "qcom-ipq4019.dtsi"
  3. #include <dt-bindings/gpio/gpio.h>
  4. #include <dt-bindings/input/input.h>
  5. #include <dt-bindings/leds/common.h>
  6. #include <dt-bindings/soc/qcom,tcsr.h>
  7. / {
  8. model = "Pakedge WR-1";
  9. compatible = "pakedge,wr-1";
  10. aliases {
  11. label-mac-device = &gmac;
  12. led-boot = &led_power;
  13. led-failsafe = &led_power;
  14. led-running = &led_power;
  15. led-upgrade = &led_power;
  16. };
  17. keys {
  18. compatible = "gpio-keys";
  19. pinctrl-0 = <&key_pins>;
  20. pinctrl-names = "default";
  21. reset {
  22. label = "reset";
  23. gpios = <&tlmm 59 GPIO_ACTIVE_LOW>;
  24. linux,code = <KEY_RESTART>;
  25. };
  26. };
  27. leds {
  28. compatible = "gpio-leds";
  29. pinctrl-0 = <&led_pins>;
  30. pinctrl-names = "default";
  31. led_power: power {
  32. gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
  33. color = <LED_COLOR_ID_BLUE>;
  34. function = LED_FUNCTION_POWER;
  35. };
  36. wlan2g {
  37. gpios = <&tlmm 1 GPIO_ACTIVE_LOW>;
  38. color = <LED_COLOR_ID_BLUE>;
  39. function = LED_FUNCTION_WLAN;
  40. linux,default-trigger = "phy0tpt";
  41. };
  42. wlan5g {
  43. gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
  44. color = <LED_COLOR_ID_BLUE>;
  45. function = LED_FUNCTION_WLAN;
  46. linux,default-trigger = "phy1tpt";
  47. };
  48. };
  49. soc {
  50. tcsr@1949000 {
  51. compatible = "qcom,tcsr";
  52. reg = <0x1949000 0x100>;
  53. qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  54. };
  55. tcsr@194b000 {
  56. compatible = "qcom,tcsr";
  57. reg = <0x194b000 0x100>;
  58. qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  59. };
  60. ess_tcsr@1953000 {
  61. compatible = "qcom,tcsr";
  62. reg = <0x1953000 0x1000>;
  63. qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  64. };
  65. tcsr@1957000 {
  66. compatible = "qcom,tcsr";
  67. reg = <0x1957000 0x100>;
  68. qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  69. };
  70. };
  71. };
  72. &blsp_dma {
  73. status = "okay";
  74. };
  75. &blsp1_spi1 {
  76. status = "okay";
  77. cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
  78. pinctrl-0 = <&spi_0_pins>;
  79. pinctrl-names = "default";
  80. flash@0 {
  81. compatible = "jedec,spi-nor";
  82. reg = <0>;
  83. spi-max-frequency = <24000000>;
  84. partitions {
  85. compatible = "fixed-partitions";
  86. #address-cells = <1>;
  87. #size-cells = <1>;
  88. partition@0 {
  89. label = "0:SBL1";
  90. reg = <0x0000000 0x0040000>;
  91. read-only;
  92. };
  93. partition@40000 {
  94. label = "0:MIBIB";
  95. reg = <0x0040000 0x0020000>;
  96. read-only;
  97. };
  98. partition@60000 {
  99. label = "0:QSEE";
  100. reg = <0x0060000 0x0060000>;
  101. read-only;
  102. };
  103. partition@c0000 {
  104. label = "0:CDT";
  105. reg = <0x00c0000 0x0010000>;
  106. read-only;
  107. };
  108. partition@d0000 {
  109. label = "0:DDRPARAMS";
  110. reg = <0x00d0000 0x0010000>;
  111. read-only;
  112. };
  113. partition@e0000 {
  114. label = "0:APPSBLENV";
  115. reg = <0x00e0000 0x0010000>;
  116. read-only;
  117. };
  118. partition@f0000 {
  119. label = "0:APPSBL";
  120. reg = <0x00f0000 0x0080000>;
  121. read-only;
  122. };
  123. partition@170000 {
  124. label = "0:ART";
  125. reg = <0x0170000 0x0010000>;
  126. read-only;
  127. };
  128. partition@180000 {
  129. label = "firmware";
  130. reg = <0x0180000 0x1e80000>;
  131. };
  132. };
  133. };
  134. };
  135. &blsp1_uart1 {
  136. status = "okay";
  137. pinctrl-0 = <&serial_pins>;
  138. pinctrl-names = "default";
  139. };
  140. &crypto {
  141. status = "okay";
  142. };
  143. &cryptobam {
  144. status = "okay";
  145. };
  146. &gmac {
  147. status = "okay";
  148. };
  149. &mdio {
  150. status = "okay";
  151. };
  152. &prng {
  153. status = "okay";
  154. };
  155. &switch {
  156. status = "okay";
  157. };
  158. &swport1 {
  159. status = "okay";
  160. label = "lan4";
  161. };
  162. &swport2 {
  163. status = "okay";
  164. label = "lan3";
  165. };
  166. &swport3 {
  167. status = "okay";
  168. label = "lan2";
  169. };
  170. &swport4 {
  171. status = "okay";
  172. label = "lan1";
  173. };
  174. &swport5 {
  175. status = "okay";
  176. };
  177. &tlmm {
  178. key_pins: key_pinmux {
  179. mux {
  180. function = "gpio";
  181. pins = "gpio59";
  182. bias-pull-up;
  183. };
  184. };
  185. led_pins: led_pinmux {
  186. mux {
  187. function = "gpio";
  188. pins = "gpio0", "gpio1", "gpio2";
  189. bias-none;
  190. drive-strength = <2>;
  191. output-low;
  192. };
  193. };
  194. serial_pins: serial_pinmux {
  195. mux {
  196. function = "blsp_uart0";
  197. pins = "gpio60", "gpio61";
  198. bias-disable;
  199. };
  200. };
  201. spi_0_pins: spi_0_pinmux {
  202. mux {
  203. function = "blsp_spi0";
  204. pins = "gpio55", "gpio56", "gpio57";
  205. bias-disable;
  206. drive-strength = <12>;
  207. };
  208. mux_cs {
  209. function = "gpio";
  210. pins = "gpio54";
  211. bias-disable;
  212. drive-strength = <2>;
  213. output-high;
  214. };
  215. };
  216. };
  217. &usb2 {
  218. status = "okay";
  219. };
  220. &usb2_hs_phy {
  221. status = "okay";
  222. };
  223. &watchdog {
  224. status = "okay";
  225. };
  226. &wifi0 {
  227. status = "okay";
  228. qcom,ath10k-calibration-variant = "Pakedge-WR-1";
  229. };
  230. &wifi1 {
  231. status = "okay";
  232. qcom,ath10k-calibration-variant = "Pakedge-WR-1";
  233. };