qcom-ipq4019-e2600ac-c2.dts 3.1 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  2. *
  3. * Copyright (c) 2018 Peng Zhang <[email protected]>
  4. *
  5. */
  6. #include "qcom-ipq4019-e2600ac.dtsi"
  7. #include <dt-bindings/gpio/gpio.h>
  8. #include <dt-bindings/input/input.h>
  9. / {
  10. model = "Qxwlan E2600AC c2";
  11. compatible = "qxwlan,e2600ac-c2";
  12. };
  13. &blsp1_spi1 {
  14. pinctrl-0 = <&spi_0_pins>;
  15. pinctrl-names = "default";
  16. status = "okay";
  17. cs-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>;
  18. flash@0 {
  19. reg = <0>;
  20. compatible = "jedec,spi-nor";
  21. spi-max-frequency = <24000000>;
  22. partitions {
  23. compatible = "fixed-partitions";
  24. #address-cells = <1>;
  25. #size-cells = <1>;
  26. partition@0 {
  27. label = "0:SBL1";
  28. reg = <0x0 0x40000>;
  29. read-only;
  30. };
  31. partition@40000 {
  32. label = "0:MIBIB";
  33. reg = <0x40000 0x20000>;
  34. read-only;
  35. };
  36. partition@60000 {
  37. label = "0:QSEE";
  38. reg = <0x60000 0x60000>;
  39. read-only;
  40. };
  41. partition@c0000 {
  42. label = "0:CDT";
  43. reg = <0xc0000 0x10000>;
  44. read-only;
  45. };
  46. partition@d0000 {
  47. label = "0:DDRPARAMS";
  48. reg = <0xd0000 0x10000>;
  49. read-only;
  50. };
  51. partition@e0000 {
  52. label = "0:APPSBLENV";
  53. reg = <0xe0000 0x10000>;
  54. read-only;
  55. };
  56. partition@f0000 {
  57. label = "0:APPSBL";
  58. reg = <0xf0000 0x80000>;
  59. read-only;
  60. };
  61. partition@170000 {
  62. label = "0:ART";
  63. reg = <0x170000 0x10000>;
  64. read-only;
  65. nvmem-layout {
  66. compatible = "fixed-layout";
  67. #address-cells = <1>;
  68. #size-cells = <1>;
  69. macaddr_gmac0: macaddr@0 {
  70. reg = <0x0 0x6>;
  71. };
  72. macaddr_gmac1: macaddr@6 {
  73. reg = <0x6 0x6>;
  74. };
  75. precal_art_1000: precal@1000 {
  76. reg = <0x1000 0x2f20>;
  77. };
  78. precal_art_5000: precal@5000 {
  79. reg = <0x5000 0x2f20>;
  80. };
  81. };
  82. };
  83. };
  84. };
  85. };
  86. &nand {
  87. pinctrl-0 = <&nand_pins>;
  88. pinctrl-names = "default";
  89. status = "okay";
  90. nand@0 {
  91. partitions {
  92. compatible = "fixed-partitions";
  93. #address-cells = <1>;
  94. #size-cells = <1>;
  95. partition@0 {
  96. label = "ubi";
  97. reg = <0x00000000 0x04000000>;
  98. };
  99. };
  100. };
  101. };
  102. &tlmm {
  103. nand_pins: nand-pins {
  104. pullups {
  105. pins = "gpio53", "gpio58", "gpio59";
  106. function = "qpic";
  107. bias-pull-up;
  108. };
  109. pulldowns {
  110. pins = "gpio54", "gpio55", "gpio56",
  111. "gpio57", "gpio60", "gpio61",
  112. "gpio62", "gpio63", "gpio64",
  113. "gpio65", "gpio66", "gpio67",
  114. "gpio68", "gpio69";
  115. function = "qpic";
  116. bias-pull-down;
  117. };
  118. };
  119. };
  120. &wifi0 {
  121. status = "okay";
  122. nvmem-cell-names = "pre-calibration";
  123. nvmem-cells = <&precal_art_1000>;
  124. qcom,ath10k-calibration-variant = "Qxwlan-E2600AC-C2";
  125. };
  126. &wifi1 {
  127. status = "okay";
  128. nvmem-cell-names = "pre-calibration";
  129. nvmem-cells = <&precal_art_5000>;
  130. qcom,ath10k-calibration-variant = "Qxwlan-E2600AC-C2";
  131. };
  132. &gmac {
  133. status = "okay";
  134. };
  135. &switch {
  136. status = "okay";
  137. };
  138. &swport2 {
  139. status = "okay";
  140. label = "sw-eth1";
  141. nvmem-cell-names = "mac-address";
  142. nvmem-cells = <&macaddr_gmac0>;
  143. };
  144. &swport4 {
  145. status = "okay";
  146. label = "sw-eth2";
  147. nvmem-cell-names = "mac-address";
  148. nvmem-cells = <&macaddr_gmac0>;
  149. };
  150. &swport5 {
  151. status = "okay";
  152. label = "sw-eth3";
  153. nvmem-cell-names = "mac-address";
  154. nvmem-cells = <&macaddr_gmac1>;
  155. };