qcom-ipq4019-eap2200.dts 5.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  2. #include "qcom-ipq4019.dtsi"
  3. #include <dt-bindings/gpio/gpio.h>
  4. #include <dt-bindings/input/input.h>
  5. #include <dt-bindings/leds/common.h>
  6. / {
  7. model = "EnGenius EAP2200";
  8. compatible = "engenius,eap2200";
  9. aliases {
  10. led-boot = &led_power;
  11. led-failsafe = &led_power;
  12. led-running = &led_power;
  13. led-upgrade = &led_power;
  14. };
  15. keys {
  16. compatible = "gpio-keys";
  17. wps {
  18. label = "wps";
  19. gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
  20. linux,code = <KEY_WPS_BUTTON>;
  21. };
  22. };
  23. leds {
  24. compatible = "gpio-leds";
  25. led_power: power {
  26. function = LED_FUNCTION_POWER;
  27. color = <LED_COLOR_ID_AMBER>;
  28. gpios = <&tlmm 43 GPIO_ACTIVE_LOW>;
  29. };
  30. lan1 {
  31. label = "blue:lan1";
  32. gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
  33. };
  34. lan2 {
  35. label = "blue:lan2";
  36. gpios = <&tlmm 45 GPIO_ACTIVE_LOW>;
  37. };
  38. wlan2g {
  39. label = "blue:wlan2g";
  40. gpios = <&tlmm 46 GPIO_ACTIVE_LOW>;
  41. linux,default-trigger = "phy0tpt";
  42. };
  43. wlan5g {
  44. label = "yellow:wlan5g";
  45. gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
  46. linux,default-trigger = "phy1tpt";
  47. };
  48. wlan5g2 {
  49. label = "yellow:wlan5g2";
  50. gpios = <&tlmm 48 GPIO_ACTIVE_LOW>;
  51. linux,default-trigger = "phy2tpt";
  52. };
  53. mode {
  54. label = "blue:mode";
  55. gpios = <&tlmm 50 GPIO_ACTIVE_LOW>;
  56. };
  57. };
  58. soc {
  59. rng@22000 {
  60. status = "okay";
  61. };
  62. mdio@90000 {
  63. status = "okay";
  64. };
  65. crypto@8e3a000 {
  66. status = "okay";
  67. };
  68. watchdog@b017000 {
  69. status = "okay";
  70. };
  71. };
  72. };
  73. &blsp_dma {
  74. status = "okay";
  75. };
  76. &blsp1_spi1 {
  77. pinctrl-0 = <&spi_0_pins>;
  78. pinctrl-names = "default";
  79. status = "okay";
  80. cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
  81. flash@0 {
  82. #address-cells = <1>;
  83. #size-cells = <1>;
  84. compatible = "jedec,spi-nor";
  85. reg = <0>;
  86. spi-max-frequency = <24000000>;
  87. partitions {
  88. compatible = "fixed-partitions";
  89. #address-cells = <1>;
  90. #size-cells = <1>;
  91. partition0@0 {
  92. label = "0:SBL1";
  93. reg = <0x00000000 0x00040000>;
  94. read-only;
  95. };
  96. partition1@40000 {
  97. label = "0:MIBIB";
  98. reg = <0x00040000 0x00020000>;
  99. read-only;
  100. };
  101. partition2@60000 {
  102. label = "0:QSEE";
  103. reg = <0x00060000 0x00060000>;
  104. read-only;
  105. };
  106. partition3@c0000 {
  107. label = "0:CDT";
  108. reg = <0x000c0000 0x00010000>;
  109. read-only;
  110. };
  111. partition4@d0000 {
  112. label = "0:DDRPARAMS";
  113. reg = <0x000d0000 0x00010000>;
  114. read-only;
  115. };
  116. partition5@e0000 {
  117. label = "0:APPSBLENV";
  118. reg = <0x000e0000 0x00010000>;
  119. read-only;
  120. };
  121. partition6@f0000 {
  122. label = "0:APPSBL";
  123. reg = <0x000f0000 0x00080000>;
  124. read-only;
  125. };
  126. partition7@170000 {
  127. label = "0:ART";
  128. reg = <0x00170000 0x00010000>;
  129. read-only;
  130. nvmem-layout {
  131. compatible = "fixed-layout";
  132. #address-cells = <1>;
  133. #size-cells = <1>;
  134. precal_art_1000: precal@1000 {
  135. reg = <0x1000 0x2f20>;
  136. };
  137. precal_art_5000: precal@5000 {
  138. reg = <0x5000 0x2f20>;
  139. };
  140. precal_art_9000: precal@9000 {
  141. reg = <0x9000 0x2f20>;
  142. };
  143. };
  144. };
  145. };
  146. };
  147. };
  148. &blsp1_uart1 {
  149. pinctrl-0 = <&serial_0_pins>;
  150. pinctrl-names = "default";
  151. status = "okay";
  152. };
  153. &cryptobam {
  154. status = "okay";
  155. };
  156. &nand {
  157. pinctrl-0 = <&nand_pins>;
  158. pinctrl-names = "default";
  159. status = "okay";
  160. nand@0 {
  161. partitions {
  162. compatible = "fixed-partitions";
  163. #address-cells = <1>;
  164. #size-cells = <1>;
  165. partition@0 {
  166. label = "rootfs1";
  167. reg = <0x00000000 0x04000000>;
  168. };
  169. partition@40000000 {
  170. label = "ubi";
  171. reg = <0x04000000 0x04000000>;
  172. };
  173. };
  174. };
  175. };
  176. &pcie0 {
  177. status = "okay";
  178. perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
  179. wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
  180. bridge@0,0 {
  181. reg = <0x00000000 0 0 0 0>;
  182. #address-cells = <3>;
  183. #size-cells = <2>;
  184. ranges;
  185. wifi2: wifi@1,0 {
  186. compatible = "qcom,ath10k";
  187. reg = <0x00010000 0 0 0 0>;
  188. nvmem-cell-names = "pre-calibration";
  189. nvmem-cells = <&precal_art_9000>;
  190. ieee80211-freq-limit = <5470000 5875000>;
  191. qcom,ath10k-calibration-variant = "EnGenius-EAP2200";
  192. };
  193. };
  194. };
  195. &qpic_bam {
  196. status = "okay";
  197. };
  198. &tlmm {
  199. nand_pins: nand_pins {
  200. pullups {
  201. pins = "gpio53", "gpio58", "gpio59";
  202. function = "qpic";
  203. bias-pull-up;
  204. };
  205. pulldowns {
  206. pins = "gpio54", "gpio55", "gpio56",
  207. "gpio57", "gpio60", "gpio61",
  208. "gpio62", "gpio63", "gpio64",
  209. "gpio65", "gpio66", "gpio67",
  210. "gpio68", "gpio69";
  211. function = "qpic";
  212. bias-pull-down;
  213. };
  214. };
  215. serial_0_pins: serial_pinmux {
  216. mux {
  217. pins = "gpio16", "gpio17";
  218. function = "blsp_uart0";
  219. bias-disable;
  220. };
  221. };
  222. spi_0_pins: spi_0_pinmux {
  223. pinmux {
  224. function = "blsp_spi0";
  225. pins = "gpio13", "gpio14", "gpio15";
  226. drive-strength = <12>;
  227. bias-disable;
  228. };
  229. pinmux_cs {
  230. function = "gpio";
  231. pins = "gpio12";
  232. drive-strength = <2>;
  233. bias-disable;
  234. output-high;
  235. };
  236. };
  237. };
  238. &wifi0 {
  239. status = "okay";
  240. nvmem-cell-names = "pre-calibration";
  241. nvmem-cells = <&precal_art_1000>;
  242. qcom,ath10k-calibration-variant = "EnGenius-EAP2200";
  243. };
  244. &wifi1 {
  245. status = "okay";
  246. ieee80211-freq-limit = <5170000 5350000>;
  247. nvmem-cell-names = "pre-calibration";
  248. nvmem-cells = <&precal_art_5000>;
  249. qcom,ath10k-calibration-variant = "EnGenius-EAP2200";
  250. };