qcom-ipq4019-mf18a.dts 8.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  2. // Copyright (c) 2022, Pawel Dembicki <[email protected]>.
  3. // Copyright (c) 2022, Marcin Gajda <[email protected]>.
  4. #include "qcom-ipq4019.dtsi"
  5. #include <dt-bindings/soc/qcom,tcsr.h>
  6. #include <dt-bindings/gpio/gpio.h>
  7. #include <dt-bindings/input/input.h>
  8. #include <dt-bindings/leds/common.h>
  9. / {
  10. model = "ZTE MF18A";
  11. compatible = "zte,mf18a";
  12. aliases {
  13. led-boot = &led_power;
  14. led-failsafe = &led_power;
  15. led-running = &led_power;
  16. led-upgrade = &led_power;
  17. };
  18. chosen {
  19. /*
  20. * bootargs forced by u-boot bootipq command:
  21. * 'ubi.mtd=rootfs root=mtd:ubi_rootfs rootfstype=squashfs rootwait'
  22. */
  23. bootargs-append = " root=/dev/ubiblock0_1";
  24. };
  25. gpio-restart {
  26. compatible = "gpio-restart";
  27. gpios = <&tlmm 8 GPIO_ACTIVE_HIGH>;
  28. };
  29. leds {
  30. compatible = "gpio-leds";
  31. led_internal: led-0 {
  32. label = "blue:internal";
  33. gpios = <&tlmm 10 GPIO_ACTIVE_LOW>;
  34. default-state = "keep";
  35. };
  36. led_power: led-1 {
  37. function = LED_FUNCTION_POWER;
  38. color = <LED_COLOR_ID_BLUE>;
  39. gpios = <&tlmm 48 GPIO_ACTIVE_HIGH>;
  40. default-state = "keep";
  41. };
  42. led-2 {
  43. function = LED_FUNCTION_WLAN;
  44. color = <LED_COLOR_ID_BLUE>;
  45. gpios = <&tlmm 23 GPIO_ACTIVE_HIGH>;
  46. linux,default-trigger = "phy0tpt";
  47. };
  48. led-3 {
  49. function = LED_FUNCTION_WLAN;
  50. color = <LED_COLOR_ID_RED>;
  51. gpios = <&tlmm 26 GPIO_ACTIVE_HIGH>;
  52. };
  53. led-4 {
  54. function = LED_FUNCTION_WLAN;
  55. label = "blue:smart";
  56. gpios = <&tlmm 22 GPIO_ACTIVE_HIGH>;
  57. linux,default-trigger = "phy1tpt";
  58. };
  59. led-5 {
  60. label = "red:smart";
  61. gpios = <&tlmm 25 GPIO_ACTIVE_HIGH>;
  62. };
  63. resetzwave {
  64. label = "resetzwave";
  65. gpios = <&tlmm 11 GPIO_ACTIVE_HIGH>;
  66. };
  67. };
  68. keys {
  69. compatible = "gpio-keys";
  70. reset {
  71. label = "reset";
  72. linux,code = <KEY_RESTART>;
  73. gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
  74. };
  75. wps {
  76. label = "wps";
  77. linux,code = <KEY_WPS_BUTTON>;
  78. gpios = <&tlmm 68 GPIO_ACTIVE_LOW>;
  79. };
  80. };
  81. soc {
  82. rng@22000 {
  83. status = "okay";
  84. };
  85. mdio@90000 {
  86. status = "okay";
  87. pinctrl-0 = <&mdio_pins>;
  88. pinctrl-names = "default";
  89. reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
  90. reset-delay-us = <2000>;
  91. };
  92. tcsr@1949000 {
  93. compatible = "qcom,tcsr";
  94. reg = <0x1949000 0x100>;
  95. qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  96. };
  97. tcsr@194b000 {
  98. /* select hostmode */
  99. compatible = "qcom,tcsr";
  100. reg = <0x194b000 0x100>;
  101. qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  102. status = "okay";
  103. };
  104. ess_tcsr@1953000 {
  105. compatible = "qcom,tcsr";
  106. reg = <0x1953000 0x1000>;
  107. qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  108. };
  109. tcsr@1957000 {
  110. compatible = "qcom,tcsr";
  111. reg = <0x1957000 0x100>;
  112. qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  113. };
  114. usb2@60f8800 {
  115. status = "okay";
  116. };
  117. usb3@8af8800 {
  118. status = "okay";
  119. };
  120. crypto@8e3a000 {
  121. status = "okay";
  122. };
  123. watchdog@b017000 {
  124. status = "okay";
  125. };
  126. };
  127. };
  128. &blsp_dma {
  129. status = "okay";
  130. };
  131. &blsp1_spi1 {
  132. pinctrl-0 = <&spi_0_pins>;
  133. pinctrl-names = "default";
  134. status = "okay";
  135. cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
  136. flash@0 {
  137. /* u-boot is looking for "n25q128a11" property */
  138. compatible = "jedec,spi-nor", "n25q128a11";
  139. #address-cells = <1>;
  140. #size-cells = <1>;
  141. reg = <0>;
  142. spi-max-frequency = <24000000>;
  143. partitions {
  144. compatible = "fixed-partitions";
  145. #address-cells = <1>;
  146. #size-cells = <1>;
  147. partition@0 {
  148. label = "0:SBL1";
  149. reg = <0x0 0x40000>;
  150. read-only;
  151. };
  152. partition@40000 {
  153. label = "0:MIBIB";
  154. reg = <0x40000 0x20000>;
  155. read-only;
  156. };
  157. partition@60000 {
  158. label = "0:QSEE";
  159. reg = <0x60000 0x60000>;
  160. read-only;
  161. };
  162. partition@c0000 {
  163. label = "0:CDT";
  164. reg = <0xc0000 0x10000>;
  165. read-only;
  166. };
  167. partition@d0000 {
  168. label = "0:DDRPARAMS";
  169. reg = <0xd0000 0x10000>;
  170. read-only;
  171. };
  172. partition@e0000 {
  173. label = "0:APPSBLENV";
  174. reg = <0xe0000 0x10000>;
  175. read-only;
  176. };
  177. partition@f0000 {
  178. label = "0:APPSBL";
  179. reg = <0xf0000 0xc0000>;
  180. read-only;
  181. };
  182. partition@1b0000 {
  183. label = "0:reserved1";
  184. reg = <0x1b0000 0x50000>;
  185. read-only;
  186. };
  187. };
  188. };
  189. };
  190. &blsp1_uart1 {
  191. pinctrl-0 = <&serial_pins>;
  192. pinctrl-names = "default";
  193. status = "okay";
  194. };
  195. &cryptobam {
  196. status = "okay";
  197. };
  198. &gmac {
  199. status = "okay";
  200. nvmem-cell-names = "mac-address";
  201. nvmem-cells = <&macaddr_config_0 0>;
  202. };
  203. &switch {
  204. status = "okay";
  205. };
  206. &swport2 {
  207. status = "okay";
  208. label = "wan";
  209. nvmem-cell-names = "mac-address";
  210. nvmem-cells = <&macaddr_config_0 1>;
  211. };
  212. &swport3 {
  213. status = "okay";
  214. label = "lan";
  215. };
  216. &nand {
  217. pinctrl-0 = <&nand_pins>;
  218. pinctrl-names = "default";
  219. status = "okay";
  220. nand@0 {
  221. partitions {
  222. compatible = "fixed-partitions";
  223. #address-cells = <1>;
  224. #size-cells = <1>;
  225. partition@0 {
  226. label = "fota-flag";
  227. reg = <0x0 0xa0000>;
  228. read-only;
  229. };
  230. partition@a0000 {
  231. label = "ART";
  232. reg = <0xa0000 0x80000>;
  233. read-only;
  234. nvmem-layout {
  235. compatible = "fixed-layout";
  236. #address-cells = <1>;
  237. #size-cells = <1>;
  238. precal_art_1000: precal@1000 {
  239. reg = <0x1000 0x2f20>;
  240. };
  241. precal_art_9000: precal@9000 {
  242. reg = <0x9000 0x2f20>;
  243. };
  244. };
  245. };
  246. partition@120000 {
  247. label = "mac";
  248. reg = <0x120000 0x80000>;
  249. read-only;
  250. nvmem-layout {
  251. compatible = "fixed-layout";
  252. #address-cells = <1>;
  253. #size-cells = <1>;
  254. macaddr_config_0: macaddr@0 {
  255. compatible = "mac-base";
  256. reg = <0x0 0x6>;
  257. #nvmem-cell-cells = <1>;
  258. };
  259. };
  260. };
  261. partition@1a0000 {
  262. label = "reserved2";
  263. reg = <0x1a0000 0xc0000>;
  264. read-only;
  265. };
  266. partition@260000 {
  267. label = "cfg-param";
  268. reg = <0x260000 0x400000>;
  269. read-only;
  270. };
  271. partition@660000 {
  272. label = "log";
  273. reg = <0x660000 0x400000>;
  274. };
  275. partition@a60000 {
  276. label = "oops";
  277. reg = <0xa60000 0xa0000>;
  278. };
  279. partition@b00000 {
  280. label = "reserved3";
  281. reg = <0xb00000 0x500000>;
  282. read-only;
  283. };
  284. partition@1000000 {
  285. label = "web";
  286. reg = <0x1000000 0x800000>;
  287. };
  288. partition@1800000 {
  289. label = "rootfs";
  290. reg = <0x1800000 0x1d00000>;
  291. };
  292. partition@3500000 {
  293. label = "data";
  294. reg = <0x3500000 0x1900000>;
  295. };
  296. partition@4e00000 {
  297. label = "fota";
  298. reg = <0x4e00000 0x2800000>;
  299. };
  300. partition@7600000 {
  301. label = "iot-db";
  302. reg = <0x7600000 0xa00000>;
  303. };
  304. };
  305. };
  306. };
  307. &qpic_bam {
  308. status = "okay";
  309. };
  310. &tlmm {
  311. i2c_0_pins: i2c_0_pinmux {
  312. mux {
  313. pins = "gpio20", "gpio21";
  314. function = "blsp_i2c0";
  315. bias-disable;
  316. };
  317. };
  318. mdio_pins: mdio_pinmux {
  319. mux_1 {
  320. pins = "gpio6";
  321. function = "mdio";
  322. bias-pull-up;
  323. };
  324. mux_2 {
  325. pins = "gpio7";
  326. function = "mdc";
  327. bias-pull-up;
  328. };
  329. };
  330. nand_pins: nand_pins {
  331. pullups {
  332. pins = "gpio52", "gpio53", "gpio58",
  333. "gpio59";
  334. function = "qpic";
  335. bias-pull-up;
  336. };
  337. pulldowns {
  338. pins = "gpio54", "gpio55", "gpio56",
  339. "gpio57", "gpio60",
  340. "gpio62", "gpio63", "gpio64",
  341. "gpio65", "gpio66", "gpio67",
  342. "gpio69";
  343. function = "qpic";
  344. bias-pull-down;
  345. };
  346. };
  347. serial_pins: serial_pinmux {
  348. mux {
  349. pins = "gpio16", "gpio17";
  350. function = "blsp_uart0";
  351. bias-disable;
  352. };
  353. };
  354. spi_0_pins: spi_0_pinmux {
  355. pinmux {
  356. function = "blsp_spi0";
  357. pins = "gpio13", "gpio14", "gpio15";
  358. drive-strength = <12>;
  359. bias-disable;
  360. };
  361. pinmux_cs {
  362. function = "gpio";
  363. pins = "gpio12";
  364. drive-strength = <2>;
  365. bias-disable;
  366. output-high;
  367. };
  368. };
  369. };
  370. &usb2_hs_phy {
  371. status = "okay";
  372. };
  373. &usb3_ss_phy {
  374. status = "okay";
  375. };
  376. &usb3_hs_phy {
  377. status = "okay";
  378. };
  379. &wifi0 {
  380. status = "okay";
  381. nvmem-cell-names = "pre-calibration", "mac-address";
  382. nvmem-cells = <&precal_art_1000>, <&macaddr_config_0 2>;
  383. qcom,ath10k-calibration-variant = "ZTE-MF18A";
  384. };
  385. //* This node is used for 5Ghz on QCA9982 */
  386. &pcie0 {
  387. status = "okay";
  388. perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
  389. wake-gpio = <&tlmm 40 GPIO_ACTIVE_LOW>;
  390. clkreq-gpio = <&tlmm 39 GPIO_ACTIVE_LOW>;
  391. bridge@0,0 {
  392. reg = <0x00000000 0 0 0 0>;
  393. #address-cells = <3>;
  394. #size-cells = <2>;
  395. ranges;
  396. wifi2: wifi@1,0 {
  397. compatible = "pci168c,0040";
  398. nvmem-cell-names = "pre-calibration", "mac-address";
  399. nvmem-cells = <&precal_art_9000>, <&macaddr_config_0 3>;
  400. qcom,ath10k-calibration-variant = "ZTE-MF18A";
  401. reg = <0x00010000 0 0 0 0>;
  402. };
  403. };
  404. };