qca9557.dtsi 6.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324
  1. // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  2. #include <dt-bindings/clock/ath79-clk.h>
  3. #include "ath79.dtsi"
  4. / {
  5. compatible = "qca,qca9557";
  6. #address-cells = <1>;
  7. #size-cells = <1>;
  8. cpus {
  9. #address-cells = <1>;
  10. #size-cells = <0>;
  11. cpu@0 {
  12. device_type = "cpu";
  13. compatible = "mips,mips74Kc";
  14. clocks = <&pll ATH79_CLK_CPU>;
  15. reg = <0>;
  16. };
  17. };
  18. extosc: ref {
  19. compatible = "fixed-clock";
  20. #clock-cells = <0>;
  21. clock-output-names = "ref";
  22. clock-frequency = <40000000>;
  23. };
  24. ahb {
  25. apb {
  26. ddr_ctrl: memory-controller@18000000 {
  27. compatible = "qca,ar9557-ddr-controller",
  28. "qca,ar7240-ddr-controller";
  29. reg = <0x18000000 0x100>;
  30. #qca,ddr-wb-channel-cells = <1>;
  31. };
  32. uart: uart@18020000 {
  33. compatible = "ns16550a";
  34. reg = <0x18020000 0x20>;
  35. interrupts = <3>;
  36. clocks = <&pll ATH79_CLK_REF>;
  37. clock-names = "uart";
  38. reg-io-width = <4>;
  39. reg-shift = <2>;
  40. no-loopback-test;
  41. status = "disabled";
  42. };
  43. usb_phy0: usb-phy0 {
  44. compatible ="qca,qca9550-usb-phy", "qca,ar7200-usb-phy";
  45. reset-names = "usb-phy", "usb-suspend-override";
  46. resets = <&rst 4>, <&rst 3>;
  47. #phy-cells = <0>;
  48. status = "disabled";
  49. };
  50. usb_phy1: usb-phy1 {
  51. compatible = "qca,qca9550-usb-phy", "qca,ar7200-usb-phy";
  52. reset-names = "usb-phy", "usb-suspend-override";
  53. resets = <&rst2 4>, <&rst2 3>;
  54. #phy-cells = <0>;
  55. status = "disabled";
  56. };
  57. gpio: gpio@18040000 {
  58. compatible = "qca,ar9557-gpio",
  59. "qca,ar9340-gpio";
  60. reg = <0x18040000 0x28>;
  61. interrupts = <2>;
  62. ngpios = <24>;
  63. gpio-controller;
  64. #gpio-cells = <2>;
  65. interrupt-controller;
  66. #interrupt-cells = <2>;
  67. };
  68. pinmux: pinmux@1804002c {
  69. compatible = "pinctrl-single";
  70. reg = <0x1804002c 0x40>;
  71. #size-cells = <0>;
  72. pinctrl-single,bit-per-mux;
  73. pinctrl-single,register-width = <32>;
  74. pinctrl-single,function-mask = <0x1>;
  75. #pinctrl-cells = <2>;
  76. jtag_disable_pins: pinmux_jtag_disable_pins {
  77. pinctrl-single,bits = <0x40 0x2 0x2>;
  78. };
  79. };
  80. pll: pll-controller@18050000 {
  81. compatible = "qca,ar9557-pll",
  82. "qca,qca9550-pll", "syscon";
  83. reg = <0x18050000 0x50>;
  84. #clock-cells = <1>;
  85. clock-output-names = "cpu", "ddr", "ahb";
  86. clocks = <&extosc>;
  87. };
  88. wdt: wdt@18060008 {
  89. compatible = "qca,ar7130-wdt";
  90. reg = <0x18060008 0x8>;
  91. interrupts = <4>;
  92. clocks = <&pll ATH79_CLK_AHB>;
  93. clock-names = "wdt";
  94. };
  95. rst: reset-controller@1806001c {
  96. compatible = "qca,qca9550-reset",
  97. "qca,ar7100-reset",
  98. "simple-bus";
  99. reg = <0x1806001c 0x4>;
  100. #reset-cells = <1>;
  101. interrupt-parent = <&cpuintc>;
  102. intc2: interrupt-controller2 {
  103. compatible = "qca,ar9340-intc";
  104. interrupt-parent = <&cpuintc>;
  105. interrupts = <2>;
  106. interrupt-controller;
  107. #interrupt-cells = <1>;
  108. qca,int-status-addr = <0xac>;
  109. qca,pending-bits = <0xf>, /* wmac */
  110. <0x1f0>; /* pcie rc 0 */
  111. };
  112. intc3: interrupt-controller3 {
  113. compatible = "qca,ar9340-intc";
  114. interrupt-parent = <&cpuintc>;
  115. interrupts = <3>;
  116. interrupt-controller;
  117. #interrupt-cells = <1>;
  118. qca,int-status-addr = <0xac>;
  119. qca,pending-bits = <0x1f000>, /* pcie rc 1 */
  120. <0x1000000>, /* usb1 */
  121. <0x10000000>; /* usb2 */
  122. };
  123. };
  124. rst2: reset-controller@180600c0 {
  125. compatible = "qca,qca9550-reset",
  126. "qca,ar7100-reset",
  127. "simple-bus";
  128. reg = <0x180600c0 0x4>;
  129. #reset-cells = <1>;
  130. };
  131. pcie0: pcie-controller@180c0000 {
  132. compatible = "qcom,ar7240-pci";
  133. #address-cells = <3>;
  134. #size-cells = <2>;
  135. bus-range = <0x0 0x0>;
  136. reg = <0x180c0000 0x1000>, /* CRP */
  137. <0x180f0000 0x100>, /* CTRL */
  138. <0x14000000 0x1000>; /* CFG */
  139. reg-names = "crp_base", "ctrl_base", "cfg_base";
  140. ranges = <0x2000000 0 0x10000000 0x10000000 0 0x04000000 /* pci memory */
  141. 0x1000000 0 0x00000000 0x0000000 0 0x000001>; /* io space */
  142. interrupt-parent = <&intc2>;
  143. interrupts = <1>;
  144. interrupt-controller;
  145. #interrupt-cells = <1>;
  146. interrupt-map-mask = <0 0 0 1>;
  147. interrupt-map = <0 0 0 0 &pcie0 0>;
  148. status = "disabled";
  149. };
  150. pcie1: pcie-controller@18250000 {
  151. compatible = "qcom,ar7240-pci";
  152. #address-cells = <3>;
  153. #size-cells = <2>;
  154. bus-range = <0x0 0x0>;
  155. reg = <0x18250000 0x1000>, /* CRP */
  156. <0x18280000 0x100>, /* CTRL */
  157. <0x16000000 0x1000>; /* CFG */
  158. reg-names = "crp_base", "ctrl_base", "cfg_base";
  159. ranges = <0x2000000 0 0x12000000 0x12000000 0 0x02000000 /* pci memory */
  160. 0x1000000 0 0x00000000 0x0000000 0 0x000001>; /* io space */
  161. interrupt-parent = <&intc3>;
  162. interrupts = <0>;
  163. interrupt-controller;
  164. #interrupt-cells = <1>;
  165. interrupt-map-mask = <0 0 0 1>;
  166. interrupt-map = <0 0 0 0 &pcie1 0>;
  167. status = "disabled";
  168. };
  169. gmac: gmac@18070000 {
  170. compatible = "qca,qca9550-gmac";
  171. reg = <0x18070000 0x14>;
  172. };
  173. wmac: wmac@18100000 {
  174. compatible = "qca,qca9550-wmac";
  175. reg = <0x18100000 0x10000>;
  176. interrupt-parent = <&intc2>;
  177. interrupts = <0>;
  178. status = "disabled";
  179. };
  180. };
  181. usb0: usb@1b000000 {
  182. compatible = "generic-ehci";
  183. reg = <0x1b000000 0x1fc>;
  184. interrupt-parent = <&intc3>;
  185. interrupts = <1>;
  186. resets = <&rst 5>;
  187. reset-names = "usb-host";
  188. has-transaction-translator;
  189. caps-offset = <0x100>;
  190. phy-names = "usb-phy0";
  191. phys = <&usb_phy0>;
  192. status = "disabled";
  193. };
  194. usb1: usb@1b400000 {
  195. compatible = "generic-ehci";
  196. reg = <0x1b400000 0x1fc>;
  197. interrupt-parent = <&intc3>;
  198. interrupts = <2>;
  199. resets = <&rst2 5>;
  200. reset-names = "usb-host";
  201. has-transaction-translator;
  202. caps-offset = <0x100>;
  203. phy-names = "usb-phy1";
  204. phys = <&usb_phy1>;
  205. status = "disabled";
  206. };
  207. spi: spi@1f000000 {
  208. compatible = "qca,ar9557-spi", "qca,ar7100-spi";
  209. reg = <0x1f000000 0x10>;
  210. clocks = <&pll ATH79_CLK_AHB>;
  211. clock-names = "ahb";
  212. status = "disabled";
  213. #address-cells = <1>;
  214. #size-cells = <0>;
  215. };
  216. };
  217. };
  218. &mdio0 {
  219. resets = <&rst 22>;
  220. reset-names = "mdio";
  221. };
  222. &eth0 {
  223. compatible = "qca,qca9550-eth", "syscon", "simple-mfd";
  224. pll-reg = <0 0x28 0>;
  225. pll-handle = <&pll>;
  226. pll-data = <0x16000000 0x00000101 0x00001616>;
  227. phy-mode = "rgmii";
  228. resets = <&rst 9>;
  229. reset-names = "mac";
  230. };
  231. &mdio1 {
  232. resets = <&rst 23>;
  233. reset-names = "mdio";
  234. };
  235. &eth1 {
  236. compatible = "qca,qca9550-eth", "syscon", "simple-mfd";
  237. pll-reg = <0 0x48 0>;
  238. pll-handle = <&pll>;
  239. pll-data = <0x16000000 0x00000101 0x00001616>;
  240. phy-mode = "sgmii";
  241. resets = <&rst 13>;
  242. reset-names = "mac";
  243. };