bcm63268.dtsi 5.0 KB

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  1. / {
  2. #address-cells = <1>;
  3. #size-cells = <1>;
  4. compatible = "brcm,bcm63268";
  5. aliases {
  6. pinctrl = &pinctrl;
  7. serial0 = &uart0;
  8. serial1 = &uart1;
  9. spi0 = &lsspi;
  10. spi1 = &hsspi;
  11. };
  12. cpus {
  13. #address-cells = <1>;
  14. #size-cells = <0>;
  15. cpu@0 {
  16. compatible = "brcm,bmips4350", "mips,mips4Kc";
  17. device_type = "cpu";
  18. reg = <0>;
  19. };
  20. cpu@1 {
  21. compatible = "brcm,bmips4350", "mips,mips4Kc";
  22. device_type = "cpu";
  23. reg = <1>;
  24. };
  25. };
  26. cpu_intc: interrupt-controller {
  27. #address-cells = <0>;
  28. compatible = "mti,cpu-interrupt-controller";
  29. interrupt-controller;
  30. #interrupt-cells = <1>;
  31. };
  32. memory { device_type = "memory"; reg = <0 0>; };
  33. ubus@10000000 {
  34. #address-cells = <1>;
  35. #size-cells = <1>;
  36. ranges;
  37. compatible = "simple-bus";
  38. interrupt-parent = <&periph_intc>;
  39. ext_intc: interrupt-controller@10000018 {
  40. compatible = "brcm,bcm6345-ext-intc";
  41. reg = <0x10000018 0x4>;
  42. interrupt-controller;
  43. #interrupt-cells = <2>;
  44. interrupts = <44>, <45>, <46>, <47>;
  45. };
  46. periph_intc: interrupt-controller@10000020 {
  47. compatible = "brcm,bcm6345-l1-intc";
  48. reg = <0x10000020 0x20>,
  49. <0x10000040 0x20>;
  50. interrupt-controller;
  51. #interrupt-cells = <1>;
  52. interrupt-parent = <&cpu_intc>;
  53. interrupts = <2>, <3>;
  54. };
  55. pinctrl: pin-controller@100000c0 {
  56. compatible = "brcm,bcm63268-pinctrl";
  57. reg = <0x100000c0 0x8>,
  58. <0x100000c8 0x8>,
  59. <0x100000d0 0x4>,
  60. <0x100000d8 0x4>,
  61. <0x100000dc 0x4>,
  62. <0x100000f8 0x4>;
  63. reg-names = "dirout", "dat", "led", "mode",
  64. "ctrl", "basemode";
  65. gpio-controller;
  66. #gpio-cells = <2>;
  67. interrupt-parent = <&periph_intc>;
  68. interrupts = <0 0>, <1 0>, <2 0>, <3 0>;
  69. interrupt-names = "gpio32", "gpio33", "gpio34", "gpio35";
  70. pinctrl_serial_led: serial_led {
  71. pinctrl_serial_led_clk: serial_led_clk {
  72. function = "serial_led_clk";
  73. pins = "gpio0";
  74. };
  75. pinctrl_serial_led_data: serial_led_data {
  76. function = "serial_led_data";
  77. pins = "gpio1";
  78. };
  79. };
  80. pinctrl_hsspi_cs4: hsspi_cs4 {
  81. function = "hsspi_cs4";
  82. pins = "gpio16";
  83. };
  84. pinctrl_hsspi_cs5: hsspi_cs5 {
  85. function = "hsspi_cs5";
  86. pins = "gpio17";
  87. };
  88. pinctrl_hsspi_cs6: hsspi_cs6 {
  89. function = "hsspi_cs6";
  90. pins = "gpio8";
  91. };
  92. pinctrl_hsspi_cs7: hsspi_cs7 {
  93. function = "hsspi_cs7";
  94. pins = "gpio9";
  95. };
  96. pinctrl_adsl_spi: adsl_spi {
  97. pinctrl_adsl_spi_miso: adsl_spi_miso {
  98. function = "adsl_spi_miso";
  99. pins = "gpio18";
  100. };
  101. pinctrl_adsl_spi_mosi: adsl_spi_mosi {
  102. function = "adsl_spi_mosi";
  103. pins = "gpio19";
  104. };
  105. };
  106. pinctrl_vreq_clk: vreq_clk {
  107. function = "vreq_clk";
  108. pins = "gpio22";
  109. };
  110. pinctrl_pcie_clkreq_b: pcie_clkreq_b {
  111. function = "pcie_clkreq_b";
  112. pins = "gpio23";
  113. };
  114. pinctrl_robosw_led_clk: robosw_led_clk {
  115. function = "robosw_led_clk";
  116. pins = "gpio30";
  117. };
  118. pinctrl_robosw_led_data: robosw_led_data {
  119. function = "robosw_led_data";
  120. pins = "gpio31";
  121. };
  122. pinctrl_nand: nand {
  123. function = "nand";
  124. group = "nand_grp";
  125. };
  126. pinctrl_gpio35_alt: gpio35_alt {
  127. function = "gpio35_alt";
  128. pin = "gpio35";
  129. };
  130. pinctrl_dectpd: dectpd {
  131. function = "dectpd";
  132. group = "dectpd_grp";
  133. };
  134. pinctrl_vdsl_phy_override_0: vdsl_phy_override_0 {
  135. function = "vdsl_phy_override_0";
  136. group = "vdsl_phy_override_0_grp";
  137. };
  138. pinctrl_vdsl_phy_override_1: vdsl_phy_override_1 {
  139. function = "vdsl_phy_override_1";
  140. group = "vdsl_phy_override_1_grp";
  141. };
  142. pinctrl_vdsl_phy_override_2: vdsl_phy_override_2 {
  143. function = "vdsl_phy_override_2";
  144. group = "vdsl_phy_override_2_grp";
  145. };
  146. pinctrl_vdsl_phy_override_3: vdsl_phy_override_3 {
  147. function = "vdsl_phy_override_3";
  148. group = "vdsl_phy_override_3_grp";
  149. };
  150. pinctrl_dsl_gpio8: dsl_gpio8 {
  151. function = "dsl_gpio8";
  152. group = "dsl_gpio8";
  153. };
  154. pinctrl_dsl_gpio9: dsl_gpio9 {
  155. function = "dsl_gpio9";
  156. group = "dsl_gpio9";
  157. };
  158. };
  159. uart0: serial@10000180 {
  160. compatible = "brcm,bcm6345-uart";
  161. reg = <0x10000180 0x18>;
  162. interrupt-parent = <&periph_intc>;
  163. interrupts = <5>;
  164. /* clocks = <&periph_clk>; */
  165. /* clock-names = "refclk"; */
  166. status = "disabled";
  167. };
  168. uart1: serial@100001a0 {
  169. compatible = "brcm,bcm6345-uart";
  170. reg = <0x100001a0 0x18>;
  171. interrupt-parent = <&periph_intc>;
  172. interrupts = <34>;
  173. /* clocks = <&periph_clk>; */
  174. /* clock-names = "refclk"; */
  175. status = "disabled";
  176. };
  177. lsspi: spi@10000800 {
  178. #address-cells = <1>;
  179. #size-cells = <0>;
  180. compatible = "brcm,bcm6358-spi";
  181. reg = <0x10000800 0x70c>;
  182. interrupts = <80>;
  183. /* clocks = <&clkctl 15>; */
  184. };
  185. hsspi: spi@10001000 {
  186. #address-cells = <1>;
  187. #size-cells = <0>;
  188. compatible = "brcm,bcm6328-hsspi";
  189. reg = <0x10001000 0x600>;
  190. interrupts = <6>;
  191. /* clocks = <&clkctl 16>; */
  192. };
  193. leds: led-controller@10001900 {
  194. #address-cells = <1>;
  195. #size-cells = <0>;
  196. compatible = "brcm,bcm6328-leds";
  197. reg = <0x10001900 0x24>;
  198. status = "disabled";
  199. };
  200. };
  201. };