301-arm-dts-ls1021a-Add-LS1021A-IOT-board-support.patch 5.4 KB

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  1. From 55e00e402d6143aeb153761f8144d9fee5f1f009 Mon Sep 17 00:00:00 2001
  2. From: Biwen Li <[email protected]>
  3. Date: Fri, 26 Oct 2018 16:00:37 +0800
  4. Subject: [PATCH] arm: dts: ls1021a: Add LS1021A-IOT board support
  5. Signed-off-by: Biwen Li <[email protected]>
  6. [rebase]
  7. Signed-off-by: Yangbo Lu <[email protected]>
  8. ---
  9. arch/arm/boot/dts/Makefile | 3 +-
  10. arch/arm/boot/dts/ls1021a-iot.dts | 262 ++++++++++++++++++++++++++++++++++++++
  11. 2 files changed, 264 insertions(+), 1 deletion(-)
  12. create mode 100644 arch/arm/boot/dts/ls1021a-iot.dts
  13. --- a/arch/arm/boot/dts/Makefile
  14. +++ b/arch/arm/boot/dts/Makefile
  15. @@ -713,7 +713,8 @@ dtb-$(CONFIG_SOC_LS1021A) += \
  16. ls1021a-moxa-uc-8410a.dtb \
  17. ls1021a-qds.dtb \
  18. ls1021a-tsn.dtb \
  19. - ls1021a-twr.dtb
  20. + ls1021a-twr.dtb \
  21. + ls1021a-iot.dtb
  22. dtb-$(CONFIG_SOC_VF610) += \
  23. vf500-colibri-eval-v3.dtb \
  24. vf610-bk4.dtb \
  25. --- /dev/null
  26. +++ b/arch/arm/boot/dts/ls1021a-iot.dts
  27. @@ -0,0 +1,262 @@
  28. +/*
  29. + * Copyright 2013-2016 Freescale Semiconductor, Inc.
  30. + *
  31. + * This program is free software; you can redistribute it and/or modify
  32. + * it under the terms of the GNU General Public License as published by
  33. + * the Free Software Foundation; either version 2 of the License, or
  34. + * (at your option) any later version.
  35. + */
  36. +
  37. +/dts-v1/;
  38. +#include "ls1021a.dtsi"
  39. +
  40. +/ {
  41. + model = "LS1021A IOT Board";
  42. +
  43. + sys_mclk: clock-mclk {
  44. + compatible = "fixed-clock";
  45. + #clock-cells = <0>;
  46. + clock-frequency = <24576000>;
  47. + };
  48. +
  49. + regulators {
  50. + compatible = "simple-bus";
  51. + #address-cells = <1>;
  52. + #size-cells = <0>;
  53. +
  54. + reg_3p3v: regulator@0 {
  55. + compatible = "regulator-fixed";
  56. + reg = <0>;
  57. + regulator-name = "3P3V";
  58. + regulator-min-microvolt = <3300000>;
  59. + regulator-max-microvolt = <3300000>;
  60. + regulator-always-on;
  61. + };
  62. +
  63. + reg_2p5v: regulator@1 {
  64. + compatible = "regulator-fixed";
  65. + reg = <1>;
  66. + regulator-name = "2P5V";
  67. + regulator-min-microvolt = <2500000>;
  68. + regulator-max-microvolt = <2500000>;
  69. + regulator-always-on;
  70. + };
  71. + };
  72. +
  73. + sound {
  74. + compatible = "simple-audio-card";
  75. + simple-audio-card,format = "i2s";
  76. + simple-audio-card,widgets =
  77. + "Microphone", "Microphone Jack",
  78. + "Headphone", "Headphone Jack",
  79. + "Speaker", "Speaker Ext",
  80. + "Line", "Line In Jack";
  81. + simple-audio-card,routing =
  82. + "MIC_IN", "Microphone Jack",
  83. + "Microphone Jack", "Mic Bias",
  84. + "LINE_IN", "Line In Jack",
  85. + "Headphone Jack", "HP_OUT",
  86. + "Speaker Ext", "LINE_OUT";
  87. +
  88. + simple-audio-card,cpu {
  89. + sound-dai = <&sai2>;
  90. + frame-master;
  91. + bitclock-master;
  92. + };
  93. +
  94. + simple-audio-card,codec {
  95. + sound-dai = <&codec>;
  96. + frame-master;
  97. + bitclock-master;
  98. + };
  99. + };
  100. +
  101. + firmware {
  102. + optee {
  103. + compatible = "linaro,optee-tz";
  104. + method = "smc";
  105. + };
  106. + };
  107. +};
  108. +
  109. +&enet0 {
  110. + tbi-handle = <&tbi1>;
  111. + phy-handle = <&phy1>;
  112. + phy-connection-type = "sgmii";
  113. + status = "okay";
  114. +};
  115. +
  116. +&enet1 {
  117. + tbi-handle = <&tbi1>;
  118. + phy-handle = <&phy3>;
  119. + phy-connection-type = "sgmii";
  120. + status = "okay";
  121. +};
  122. +
  123. +&enet2 {
  124. + fixed-link = <0 1 1000 0 0>;
  125. + phy-connection-type = "rgmii-id";
  126. + status = "okay";
  127. +};
  128. +
  129. +&can0{
  130. + status = "disabled";
  131. +};
  132. +
  133. +&can1{
  134. + status = "disabled";
  135. +};
  136. +
  137. +&can2{
  138. + status = "disabled";
  139. +};
  140. +
  141. +&can3{
  142. + status = "okay";
  143. +};
  144. +
  145. +&esdhc{
  146. + status = "okay";
  147. +};
  148. +
  149. +&i2c0 {
  150. + status = "okay";
  151. +
  152. + max1239@35 {
  153. + compatible = "maxim,max1239";
  154. + reg = <0x35>;
  155. + #io-channel-cells = <1>;
  156. + };
  157. +
  158. + codec: sgtl5000@2a {
  159. + #sound-dai-cells=<0x0>;
  160. + compatible = "fsl,sgtl5000";
  161. + reg = <0x2a>;
  162. + VDDA-supply = <&reg_3p3v>;
  163. + VDDIO-supply = <&reg_2p5v>;
  164. + clocks = <&sys_mclk 1>;
  165. + };
  166. +
  167. + pca9555: pca9555@23 {
  168. + compatible = "nxp,pca9555";
  169. + /*pinctrl-names = "default";*/
  170. + /*interrupt-parent = <&gpio2>;
  171. + interrupts = <19 0x2>;*/
  172. + gpio-controller;
  173. + #gpio-cells = <2>;
  174. + interrupt-controller;
  175. + #interrupt-cells = <2>;
  176. + reg = <0x23>;
  177. + };
  178. +
  179. + ina220@44 {
  180. + compatible = "ti,ina220";
  181. + reg = <0x44>;
  182. + shunt-resistor = <1000>;
  183. + };
  184. +
  185. + ina220@45 {
  186. + compatible = "ti,ina220";
  187. + reg = <0x45>;
  188. + shunt-resistor = <1000>;
  189. + };
  190. +
  191. + lm75b@48 {
  192. + compatible = "nxp,lm75a";
  193. + reg = <0x48>;
  194. + };
  195. +
  196. + adt7461a@4c {
  197. + compatible = "adt7461a";
  198. + reg = <0x4c>;
  199. + };
  200. +
  201. + hdmi: sii9022a@39 {
  202. + compatible = "fsl,sii902x";
  203. + reg = <0x39>;
  204. + interrupts = <GIC_SPI 163 IRQ_TYPE_EDGE_RISING>;
  205. + };
  206. +};
  207. +
  208. +&i2c1 {
  209. + status = "disabled";
  210. +};
  211. +
  212. +&ifc {
  213. + status = "disabled";
  214. +};
  215. +
  216. +&lpuart0 {
  217. + status = "okay";
  218. +};
  219. +
  220. +&mdio0 {
  221. + phy0: ethernet-phy@0 {
  222. + reg = <0x0>;
  223. + };
  224. + phy1: ethernet-phy@1 {
  225. + reg = <0x1>;
  226. + };
  227. + phy2: ethernet-phy@2 {
  228. + reg = <0x2>;
  229. + };
  230. + phy3: ethernet-phy@3 {
  231. + reg = <0x3>;
  232. + };
  233. + tbi1: tbi-phy@1f {
  234. + reg = <0x1f>;
  235. + device_type = "tbi-phy";
  236. + };
  237. +};
  238. +
  239. +&qspi {
  240. + num-cs = <2>;
  241. + status = "okay";
  242. +
  243. + qflash0: s25fl128s@0 {
  244. + compatible = "spansion,s25fl129p1";
  245. + #address-cells = <1>;
  246. + #size-cells = <1>;
  247. + spi-max-frequency = <20000000>;
  248. + reg = <0>;
  249. + };
  250. +};
  251. +
  252. +&sai2 {
  253. + status = "okay";
  254. +};
  255. +
  256. +&uart0 {
  257. + status = "okay";
  258. +};
  259. +
  260. +&uart1 {
  261. + status = "okay";
  262. +};
  263. +
  264. +&dcu {
  265. + display = <&display>;
  266. + status = "okay";
  267. +
  268. + display: display@0 {
  269. + bits-per-pixel = <24>;
  270. +
  271. + display-timings {
  272. + native-mode = <&timing0>;
  273. +
  274. + timing0: mode0 {
  275. + clock-frequency = <25000000>;
  276. + hactive = <640>;
  277. + vactive = <480>;
  278. + hback-porch = <80>;
  279. + hfront-porch = <80>;
  280. + vback-porch = <16>;
  281. + vfront-porch = <16>;
  282. + hsync-len = <12>;
  283. + vsync-len = <2>;
  284. + hsync-active = <1>;
  285. + vsync-active = <1>;
  286. + };
  287. + };
  288. + };
  289. +};