032-m5445x_edma_update.patch 17 KB

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  1. From 7b5b08d99d5362e9c36fd7d42d6c06c2a848266c Mon Sep 17 00:00:00 2001
  2. From: Kurt Mahan <[email protected]>
  3. Date: Sun, 9 Dec 2007 02:21:19 -0700
  4. Subject: [PATCH] Update EDMA.
  5. LTIBName: m5445x-edma-update
  6. Signed-off-by: Kurt Mahan <[email protected]>
  7. ---
  8. drivers/spi/coldfire_edma.c | 261 +++++++++++++++++++++++---------------
  9. include/asm-m68k/coldfire_edma.h | 9 +-
  10. include/asm-m68k/mcf5445x_edma.h | 28 +++-
  11. 3 files changed, 188 insertions(+), 110 deletions(-)
  12. --- a/drivers/spi/coldfire_edma.c
  13. +++ b/drivers/spi/coldfire_edma.c
  14. @@ -20,76 +20,91 @@
  15. #include <linux/cdev.h>
  16. #include <linux/seq_file.h>
  17. #include <linux/proc_fs.h>
  18. +#ifdef CONFIG_M54455
  19. #include <asm/mcf5445x_edma.h>
  20. #include <asm/mcf5445x_intc.h>
  21. +#endif /* CONFIG_M54455 */
  22. #include <asm/coldfire_edma.h>
  23. -
  24. -/* callback handler data for each TCD */
  25. +/*
  26. + * Callback handler data for each TCD
  27. + */
  28. struct edma_isr_record {
  29. - edma_irq_handler irq_handler; /* interrupt handler */
  30. - edma_error_handler error_handler; /* error interrupt handler */
  31. - void* dev; /* device used for the channel */
  32. - int allocated; /* busy flag */
  33. - spinlock_t *lock; /* spin lock (if needs to be locked in interrupt) */
  34. - const char* device_id; /* device id string, used in proc file system */
  35. + edma_irq_handler irq_handler; /* interrupt handler */
  36. + edma_error_handler error_handler; /* error interrupt handler */
  37. + void *arg; /* argument to pass back */
  38. + int allocated; /* busy flag */
  39. + spinlock_t *lock; /* spin lock (optional) */
  40. + const char *device_id; /* dev id string, used in procfs */
  41. };
  42. -/* device structure */
  43. +/*
  44. + * Device structure
  45. + */
  46. struct coldfire_edma_dev {
  47. - struct cdev cdev; /* character device */
  48. - struct edma_isr_record dma_interrupt_handlers[EDMA_CHANNELS]; /* channel handlers */
  49. + struct cdev cdev; /* character device */
  50. + struct edma_isr_record dma_interrupt_handlers[EDMA_CHANNELS];
  51. };
  52. /* allocated major device number */
  53. static int coldfire_dma_major;
  54. +
  55. /* device driver structure */
  56. -static struct coldfire_edma_dev* devp = NULL;
  57. +static struct coldfire_edma_dev *devp = NULL;
  58. /* device driver file operations */
  59. struct file_operations coldfire_edma_fops = {
  60. .owner = THIS_MODULE,
  61. };
  62. -/* eDMA channel interrupt handler */
  63. +/**
  64. + * dmaisr - eDMA channel interrupt handler
  65. + * @irq: interrupt number
  66. + * @dev_id: argument
  67. + */
  68. static int dmaisr(int irq, void *dev_id)
  69. {
  70. int channel = irq - EDMA_INT_CONTROLLER_BASE - EDMA_INT_CHANNEL_BASE;
  71. int result = IRQ_HANDLED;
  72. - if (devp!=NULL && devp->dma_interrupt_handlers[channel].lock) {
  73. - spin_lock(devp->dma_interrupt_handlers[channel].lock);
  74. - }
  75. + if ((devp != NULL) &&
  76. + (devp->dma_interrupt_handlers[channel].irq_handler)) {
  77. + /* call user irq handler */
  78. + if (devp->dma_interrupt_handlers[channel].lock)
  79. + spin_lock(devp->dma_interrupt_handlers[channel].lock);
  80. +
  81. + result = devp->dma_interrupt_handlers[channel].irq_handler(
  82. + channel, devp->dma_interrupt_handlers[channel].arg);
  83. - if (devp!=NULL && devp->dma_interrupt_handlers[channel].irq_handler) {
  84. - result = devp->dma_interrupt_handlers[channel].irq_handler(channel,
  85. - devp->dma_interrupt_handlers[channel].dev);
  86. + if (devp->dma_interrupt_handlers[channel].lock)
  87. + spin_unlock(devp->dma_interrupt_handlers[channel].lock);
  88. } else {
  89. + /* no irq handler so just ack it */
  90. confirm_edma_interrupt_handled(channel);
  91. - printk(EDMA_DRIVER_NAME ": No handler for DMA channel %d\n", channel);
  92. - }
  93. -
  94. - if (devp!=NULL && devp->dma_interrupt_handlers[channel].lock) {
  95. - spin_unlock(devp->dma_interrupt_handlers[channel].lock);
  96. + printk(EDMA_DRIVER_NAME ": No handler for DMA channel %d\n",
  97. + channel);
  98. }
  99. return result;
  100. }
  101. -/* eDMA error interrupt handler */
  102. +/**
  103. + * dma_error_isr - eDMA error interrupt handler
  104. + * @irq: interrupt number
  105. + * @dev_id: argument
  106. + */
  107. static int dma_error_isr(int irq, void* dev_id)
  108. {
  109. u16 err;
  110. int i;
  111. err = MCF_EDMA_ERR;
  112. - for (i=0;i<EDMA_CHANNELS;i++) {
  113. + for (i=0; i<EDMA_CHANNELS; i++) {
  114. if (err & (1<<i)) {
  115. - if (devp!=NULL && devp->dma_interrupt_handlers[i].error_handler) {
  116. - devp->dma_interrupt_handlers[i].error_handler(i, devp->dma_interrupt_handlers[i].dev);
  117. - } else {
  118. + if (devp!=NULL && devp->dma_interrupt_handlers[i].error_handler)
  119. + devp->dma_interrupt_handlers[i].error_handler(i, devp->dma_interrupt_handlers[i].arg);
  120. + else
  121. printk(KERN_WARNING EDMA_DRIVER_NAME ": DMA error on channel %d\n", i);
  122. - }
  123. }
  124. }
  125. @@ -97,11 +112,26 @@ static int dma_error_isr(int irq, void*
  126. return IRQ_HANDLED;
  127. }
  128. -/* sets channel parameters */
  129. +/**
  130. + * set_edma_params - Set transfer control descriptor (TCD)
  131. + * @channel: channel number
  132. + * @source: source address
  133. + * @dest: destination address
  134. + * @attr: attributes
  135. + * @soff: source offset
  136. + * @nbytes: number of bytes to be transfered in minor loop
  137. + * @slast: last source address adjustment
  138. + * @citer: major loop count
  139. + * @biter: beginning minor loop count
  140. + * @doff: destination offset
  141. + * @dlast_sga: last destination address adjustment
  142. + * @major_int: generate interrupt after each major loop
  143. + * @disable_req: disable DMA request after major loop
  144. + */
  145. void set_edma_params(int channel, u32 source, u32 dest,
  146. - u32 attr, u32 soff, u32 nbytes, u32 slast,
  147. - u32 citer, u32 biter, u32 doff, u32 dlast_sga,
  148. - int major_int, int disable_req)
  149. + u32 attr, u32 soff, u32 nbytes, u32 slast,
  150. + u32 citer, u32 biter, u32 doff, u32 dlast_sga,
  151. + int major_int, int disable_req)
  152. {
  153. if (channel<0 || channel>EDMA_CHANNELS)
  154. @@ -117,45 +147,56 @@ void set_edma_params(int channel, u32 so
  155. MCF_EDMA_TCD_BITER(channel)=MCF_EDMA_TCD_BITER_BITER(biter);
  156. MCF_EDMA_TCD_DOFF(channel) = MCF_EDMA_TCD_DOFF_DOFF(doff);
  157. MCF_EDMA_TCD_DLAST_SGA(channel) = MCF_EDMA_TCD_DLAST_SGA_DLAST_SGA(dlast_sga);
  158. +
  159. /* interrupt at the end of major loop */
  160. - if (major_int) {
  161. + if (major_int)
  162. MCF_EDMA_TCD_CSR(channel) |= MCF_EDMA_TCD_CSR_INT_MAJOR;
  163. - } else {
  164. + else
  165. MCF_EDMA_TCD_CSR(channel) &= ~MCF_EDMA_TCD_CSR_INT_MAJOR;
  166. - }
  167. +
  168. /* disable request at the end of major loop of transfer or not*/
  169. - if (disable_req) {
  170. + if (disable_req)
  171. MCF_EDMA_TCD_CSR(channel) |= MCF_EDMA_TCD_CSR_D_REQ;
  172. - } else {
  173. + else
  174. MCF_EDMA_TCD_CSR(channel) &= ~MCF_EDMA_TCD_CSR_D_REQ;
  175. - }
  176. -
  177. }
  178. EXPORT_SYMBOL(set_edma_params);
  179. -/* init eDMA controller */
  180. +/**
  181. + * init_edma - Initialize the eDMA controller
  182. + */
  183. void init_edma(void)
  184. {
  185. MCF_EDMA_CR = 0;
  186. }
  187. EXPORT_SYMBOL(init_edma);
  188. -/* request eDMA channel */
  189. +/**
  190. + * request_edma_channel - Request an eDMA channel
  191. + * @channel: channel number
  192. + * @handler: dma handler
  193. + * @error_handler: dma error handler
  194. + * @arg: argument to pass back
  195. + * @lock: optional spinlock to hold over interrupt
  196. + * @device_id: device id
  197. + *
  198. + * Returns 0 if success or a negative value if failure
  199. + */
  200. int request_edma_channel(int channel,
  201. - edma_irq_handler handler,
  202. - edma_error_handler error_handler,
  203. - void* dev,
  204. - spinlock_t *lock,
  205. - const char* device_id )
  206. + edma_irq_handler handler,
  207. + edma_error_handler error_handler,
  208. + void *arg,
  209. + spinlock_t *lock,
  210. + const char *device_id )
  211. {
  212. if (devp!=NULL && channel>=0 && channel<=EDMA_CHANNELS) {
  213. - if (devp->dma_interrupt_handlers[channel].allocated) {
  214. + if (devp->dma_interrupt_handlers[channel].allocated)
  215. return -EBUSY;
  216. - }
  217. +
  218. devp->dma_interrupt_handlers[channel].allocated = 1;
  219. devp->dma_interrupt_handlers[channel].irq_handler = handler;
  220. devp->dma_interrupt_handlers[channel].error_handler = error_handler;
  221. - devp->dma_interrupt_handlers[channel].dev = dev;
  222. + devp->dma_interrupt_handlers[channel].arg = arg;
  223. devp->dma_interrupt_handlers[channel].lock = lock;
  224. devp->dma_interrupt_handlers[channel].device_id = device_id;
  225. return 0;
  226. @@ -164,16 +205,22 @@ int request_edma_channel(int channel,
  227. }
  228. EXPORT_SYMBOL(request_edma_channel);
  229. -/* free eDMA channel */
  230. -int free_edma_channel(int channel, void* dev)
  231. +/**
  232. + * free_edma_channel - Free the edma channel
  233. + * @channel: channel number
  234. + * @arg: argument created with
  235. + *
  236. + * Returns 0 if success or a negative value if failure
  237. + */
  238. +int free_edma_channel(int channel, void *arg)
  239. {
  240. if (devp!=NULL && channel>=0 && channel<=EDMA_CHANNELS) {
  241. if (devp->dma_interrupt_handlers[channel].allocated) {
  242. - if (devp->dma_interrupt_handlers[channel].dev != dev) {
  243. + if (devp->dma_interrupt_handlers[channel].arg != arg)
  244. return -EBUSY;
  245. - }
  246. +
  247. devp->dma_interrupt_handlers[channel].allocated = 0;
  248. - devp->dma_interrupt_handlers[channel].dev = NULL;
  249. + devp->dma_interrupt_handlers[channel].arg = NULL;
  250. devp->dma_interrupt_handlers[channel].irq_handler = NULL;
  251. devp->dma_interrupt_handlers[channel].error_handler = NULL;
  252. devp->dma_interrupt_handlers[channel].lock = NULL;
  253. @@ -184,7 +231,9 @@ int free_edma_channel(int channel, void*
  254. }
  255. EXPORT_SYMBOL(free_edma_channel);
  256. -/* clean-up device driver allocated resources */
  257. +/**
  258. + * coldfire_edma_cleanup - cleanup driver allocated resources
  259. + */
  260. static void coldfire_edma_cleanup(void)
  261. {
  262. dev_t devno;
  263. @@ -192,13 +241,10 @@ static void coldfire_edma_cleanup(void)
  264. /* free interrupts/memory */
  265. if (devp) {
  266. - for (i=0;i<EDMA_CHANNELS;i++)
  267. - {
  268. - MCF_INTC0_SIMR = EDMA_INT_CHANNEL_BASE+i;
  269. - free_irq(EDMA_INT_CHANNEL_BASE+EDMA_INT_CONTROLLER_BASE+i, devp);
  270. - }
  271. - MCF_INTC0_SIMR = EDMA_INT_CHANNEL_BASE+EDMA_CHANNELS;
  272. - free_irq(EDMA_INT_CHANNEL_BASE+EDMA_INT_CONTROLLER_BASE+EDMA_CHANNELS, devp);
  273. + for (i=0; i<EDMA_CHANNELS; i++)
  274. + free_irq(EDMA_INT_BASE+i, devp);
  275. +
  276. + free_irq(EDMA_INT_BASE+EDMA_INT_ERR, devp);
  277. cdev_del(&devp->cdev);
  278. kfree(devp);
  279. }
  280. @@ -209,30 +255,42 @@ static void coldfire_edma_cleanup(void)
  281. }
  282. #ifdef CONFIG_PROC_FS
  283. -/* proc file system support */
  284. +/*
  285. + * proc file system support
  286. + */
  287. #define FREE_CHANNEL "free"
  288. #define DEVICE_UNKNOWN "device unknown"
  289. +/**
  290. + * proc_edma_show - print out proc info
  291. + * @m: seq_file
  292. + * @v:
  293. + */
  294. static int proc_edma_show(struct seq_file *m, void *v)
  295. {
  296. int i;
  297. - if (devp==NULL) return 0;
  298. + if (devp == NULL)
  299. + return 0;
  300. for (i = 0 ; i < EDMA_CHANNELS ; i++) {
  301. if (devp->dma_interrupt_handlers[i].allocated) {
  302. if (devp->dma_interrupt_handlers[i].device_id)
  303. - seq_printf(m, "%2d: %s\n", i, devp->dma_interrupt_handlers[i].device_id);
  304. + seq_printf(m, "%2d: %s\n", i, devp->dma_interrupt_handlers[i].device_id);
  305. else
  306. seq_printf(m, "%2d: %s\n", i, DEVICE_UNKNOWN);
  307. - } else {
  308. + } else
  309. seq_printf(m, "%2d: %s\n", i, FREE_CHANNEL);
  310. - }
  311. }
  312. return 0;
  313. }
  314. +/**
  315. + * proc_edma_open - open the proc file
  316. + * @inode: inode ptr
  317. + * @file: file ptr
  318. + */
  319. static int proc_edma_open(struct inode *inode, struct file *file)
  320. {
  321. return single_open(file, proc_edma_show, NULL);
  322. @@ -245,6 +303,9 @@ static const struct file_operations proc
  323. .release = single_release,
  324. };
  325. +/**
  326. + * proc_edma_init - initialize proc filesystem
  327. + */
  328. static int __init proc_edma_init(void)
  329. {
  330. struct proc_dir_entry *e;
  331. @@ -258,7 +319,9 @@ static int __init proc_edma_init(void)
  332. #endif
  333. -/* initializes device driver */
  334. +/**
  335. + * coldfire_edma_init - eDMA module init
  336. + */
  337. static int __init coldfire_edma_init(void)
  338. {
  339. dev_t dev;
  340. @@ -267,8 +330,9 @@ static int __init coldfire_edma_init(voi
  341. /* allocate free major number */
  342. result = alloc_chrdev_region(&dev, DMA_DEV_MINOR, 1, EDMA_DRIVER_NAME);
  343. - if (result<0) {
  344. - printk(KERN_WARNING EDMA_DRIVER_NAME": can't get major %d\n", result);
  345. + if (result < 0) {
  346. + printk(KERN_WARNING EDMA_DRIVER_NAME": can't get major %d\n",
  347. + result);
  348. return result;
  349. }
  350. coldfire_dma_major = MAJOR(dev);
  351. @@ -280,71 +344,68 @@ static int __init coldfire_edma_init(voi
  352. goto fail;
  353. }
  354. - /* init handlers (no handlers for beggining) */
  355. - for (i=0;i<EDMA_CHANNELS;i++) {
  356. + /* init handlers (no handlers for beginning) */
  357. + for (i = 0; i < EDMA_CHANNELS; i++) {
  358. devp->dma_interrupt_handlers[i].irq_handler = NULL;
  359. devp->dma_interrupt_handlers[i].error_handler = NULL;
  360. - devp->dma_interrupt_handlers[i].dev = NULL;
  361. + devp->dma_interrupt_handlers[i].arg = NULL;
  362. devp->dma_interrupt_handlers[i].allocated = 0;
  363. devp->dma_interrupt_handlers[i].lock = NULL;
  364. devp->dma_interrupt_handlers[i].device_id = NULL;
  365. }
  366. - /* register char device */
  367. + /* register char device */
  368. cdev_init(&devp->cdev, &coldfire_edma_fops);
  369. devp->cdev.owner = THIS_MODULE;
  370. devp->cdev.ops = &coldfire_edma_fops;
  371. result = cdev_add(&devp->cdev, dev, 1);
  372. if (result) {
  373. - printk(KERN_NOTICE EDMA_DRIVER_NAME": Error %d adding coldfire-dma device\n", result);
  374. + printk(KERN_NOTICE EDMA_DRIVER_NAME
  375. + ": Error %d adding coldfire-dma device\n", result);
  376. result = -ENODEV;
  377. goto fail;
  378. }
  379. /* request/enable irq for each eDMA channel */
  380. - for (i=0;i<EDMA_CHANNELS;i++)
  381. - {
  382. - result = request_irq(EDMA_INT_CHANNEL_BASE+EDMA_INT_CONTROLLER_BASE+i,
  383. - dmaisr, SA_INTERRUPT, EDMA_DRIVER_NAME, devp);
  384. + for (i = 0; i < EDMA_CHANNELS;i++) {
  385. + result = request_irq(EDMA_INT_BASE + i,
  386. + dmaisr, IRQF_DISABLED,
  387. + EDMA_DRIVER_NAME, devp);
  388. if (result) {
  389. - printk(KERN_WARNING EDMA_DRIVER_NAME": Cannot request irq %d\n",
  390. - EDMA_INT_CHANNEL_BASE+EDMA_INT_CONTROLLER_BASE+i);
  391. + printk(KERN_WARNING EDMA_DRIVER_NAME
  392. + ": Cannot request irq %d\n",
  393. + (EDMA_INT_BASE + EDMA_INT_ERR+i));
  394. result = -EBUSY;
  395. goto fail;
  396. }
  397. -
  398. - MCF_INTC0_ICR(EDMA_INT_CHANNEL_BASE+i) = EDMA_IRQ_LEVEL;
  399. - MCF_INTC0_CIMR = EDMA_INT_CHANNEL_BASE+i;
  400. -
  401. }
  402. - /* request error interrupt */
  403. - result = request_irq(EDMA_INT_CHANNEL_BASE + EDMA_INT_CONTROLLER_BASE + EDMA_CHANNELS,
  404. - dma_error_isr, SA_INTERRUPT, EDMA_DRIVER_NAME, devp);
  405. + /* request error interrupt */
  406. + result = request_irq(EDMA_INT_BASE + EDMA_INT_ERR,
  407. + dma_error_isr, IRQF_DISABLED,
  408. + EDMA_DRIVER_NAME, devp);
  409. if (result) {
  410. - printk(KERN_WARNING EDMA_DRIVER_NAME": Cannot request irq %d\n",
  411. - EDMA_INT_CHANNEL_BASE+EDMA_INT_CONTROLLER_BASE+EDMA_CHANNELS);
  412. + printk(KERN_WARNING EDMA_DRIVER_NAME
  413. + ": Cannot request irq %d\n",
  414. + (EDMA_INT_BASE + EDMA_INT_ERR));
  415. result = -EBUSY;
  416. goto fail;
  417. }
  418. - /* enable error interrupt in interrupt controller */
  419. - MCF_INTC0_ICR(EDMA_INT_CHANNEL_BASE+EDMA_CHANNELS) = EDMA_IRQ_LEVEL;
  420. - MCF_INTC0_CIMR = EDMA_INT_CHANNEL_BASE+EDMA_CHANNELS;
  421. -
  422. #ifdef CONFIG_PROC_FS
  423. proc_edma_init();
  424. #endif
  425. printk(EDMA_DRIVER_NAME ": initialized successfully\n");
  426. -
  427. return 0;
  428. fail:
  429. coldfire_edma_cleanup();
  430. return result;
  431. -
  432. }
  433. +/**
  434. + * coldfire_edma_exit - eDMA module exit
  435. + */
  436. static void __exit coldfire_edma_exit(void)
  437. {
  438. coldfire_edma_cleanup();
  439. @@ -354,5 +415,5 @@ module_init(coldfire_edma_init);
  440. module_exit(coldfire_edma_exit);
  441. MODULE_LICENSE("GPL");
  442. -MODULE_AUTHOR("Yaroslav Vinogradov, Freescale Inc.");
  443. -MODULE_DESCRIPTION("eDMA library for Coldfire 5445x");
  444. +MODULE_AUTHOR("Freescale Semiconductor, Inc.");
  445. +MODULE_DESCRIPTION("eDMA library for Coldfire M5445x");
  446. --- a/include/asm-m68k/coldfire_edma.h
  447. +++ b/include/asm-m68k/coldfire_edma.h
  448. @@ -20,11 +20,14 @@
  449. #define EDMA_DRIVER_NAME "ColdFire-eDMA"
  450. #define DMA_DEV_MINOR 1
  451. +#ifdef CONFIG_M54455
  452. #define EDMA_INT_CHANNEL_BASE 8
  453. #define EDMA_INT_CONTROLLER_BASE 64
  454. +#define EDMA_INT_BASE (EDMA_INT_CHANNEL_BASE + \
  455. + EDMA_INT_CONTROLLER_BASE)
  456. #define EDMA_CHANNELS 16
  457. -
  458. -#define EDMA_IRQ_LEVEL 5
  459. +#define EDMA_INT_ERR 16 /* edma error interrupt */
  460. +#endif /* CONFIG_M54455 */
  461. typedef irqreturn_t (*edma_irq_handler)(int, void *);
  462. typedef void (*edma_error_handler)(int, void *);
  463. @@ -38,7 +41,7 @@ typedef void (*edma_error_handler)(int,
  464. * nbytes - number of bytes to be transfered in minor loop
  465. * slast - last source address adjustment
  466. * citer - major loop count
  467. - * biter - beggining minor loop count
  468. + * biter - begining minor loop count
  469. * doff - destination offset
  470. * dlast_sga - last destination address adjustment
  471. * major_int - generate interrupt after each major loop
  472. --- a/include/asm-m68k/mcf5445x_edma.h
  473. +++ b/include/asm-m68k/mcf5445x_edma.h
  474. @@ -11,11 +11,27 @@
  475. #ifndef __MCF5445X_EDMA_H__
  476. #define __MCF5445X_EDMA_H__
  477. -/*********************************************************************
  478. -*
  479. -* Enhanced DMA (EDMA)
  480. -*
  481. -*********************************************************************/
  482. +/*
  483. + * Enhanced DMA (EDMA)
  484. + */
  485. +
  486. +/* Channels */
  487. +#define MCF_EDMA_CHAN_DREQ0 0 /* External DMA request 0 */
  488. +#define MCF_EDMA_CHAN_DREQ1 1 /* External DMA request 1 */
  489. +#define MCF_EDMA_CHAN_UART0_RX 2 /* UART0 Receive */
  490. +#define MCF_EDMA_CHAN_UART0_TX 3 /* UART0 Transmit */
  491. +#define MCF_EDMA_CHAN_UART1_RX 4 /* UART1 Receive */
  492. +#define MCF_EDMA_CHAN_UART1_TX 5 /* UART1 Transmit */
  493. +#define MCF_EDMA_CHAN_UART2_RX 6 /* UART2 Receive */
  494. +#define MCF_EDMA_CHAN_UART2_TX 7 /* UART2 Transmit */
  495. +#define MCF_EDMA_CHAN_TIMER0 8 /* Timer 0 / SSI0 Rx */
  496. +#define MCF_EDMA_CHAN_TIMER1 9 /* Timer 1 / SSI1 Rx */
  497. +#define MCF_EDMA_CHAN_TIMER2 10 /* Timer 2 / SSI0 Tx */
  498. +#define MCF_EDMA_CHAN_TIMER3 11 /* Timer 3 / SSI1 Tx */
  499. +#define MCF_EDMA_CHAN_DSPI_RX 12 /* DSPI Receive */
  500. +#define MCF_EDMA_CHAN_DSPI_TX 13 /* DSPI Transmit */
  501. +#define MCF_EDMA_CHAN_ATA_RX 14 /* ATA Receive */
  502. +#define MCF_EDMA_CHAN_ATA_TX 15 /* ATA Transmit */
  503. /* Register read/write macros */
  504. #define MCF_EDMA_CR MCF_REG32(0xFC044000)
  505. @@ -1453,6 +1469,4 @@
  506. #define MCF_EDMA_TCD15_CSR_LINKCH(x) (((x)&0x003F)<<8)
  507. #define MCF_EDMA_TCD15_CSR_BWC(x) (((x)&0x0003)<<14)
  508. -/********************************************************************/
  509. -
  510. #endif /* __MCF5445X_EDMA_H__ */