000-cpufreq.patch 19 KB

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  1. diff -Nurbw linux-2.6.17/arch/arm/Kconfig linux-2.6.17-patched/arch/arm/Kconfig
  2. --- linux-2.6.17/arch/arm/Kconfig 2006-06-17 18:49:35.000000000 -0700
  3. +++ linux-2.6.17-patched/arch/arm/Kconfig 2006-09-21 14:57:02.000000000 -0700
  4. @@ -656,7 +656,7 @@
  5. endmenu
  6. -if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP1)
  7. +if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP1 || ARCH_PXA)
  8. menu "CPU Frequency scaling"
  9. @@ -685,6 +685,13 @@
  10. endmenu
  11. +config CPU_FREQ_PXA
  12. + bool
  13. + depends on CPU_FREQ && ARCH_PXA
  14. + default y
  15. + select CPU_FREQ_DEFAULT_GOV_USERSPACE
  16. + select CPU_FREQ_TABLE
  17. +
  18. endif
  19. menu "Floating point emulation"
  20. diff -Nurbw linux-2.6.17/arch/arm/mach-pxa/cpu-pxa.c linux-2.6.17-patched/arch/arm/mach-pxa/cpu-pxa.c
  21. --- linux-2.6.17/arch/arm/mach-pxa/cpu-pxa.c 1969-12-31 16:00:00.000000000 -0800
  22. +++ linux-2.6.17-patched/arch/arm/mach-pxa/cpu-pxa.c 2006-09-21 14:57:02.000000000 -0700
  23. @@ -0,0 +1,324 @@
  24. +/*
  25. + * linux/arch/arm/mach-pxa/cpu-pxa.c
  26. + *
  27. + * Copyright (C) 2002,2003 Intrinsyc Software
  28. + *
  29. + * This program is free software; you can redistribute it and/or modify
  30. + * it under the terms of the GNU General Public License as published by
  31. + * the Free Software Foundation; either version 2 of the License, or
  32. + * (at your option) any later version.
  33. + *
  34. + * This program is distributed in the hope that it will be useful,
  35. + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  36. + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  37. + * GNU General Public License for more details.
  38. + *
  39. + * You should have received a copy of the GNU General Public License
  40. + * along with this program; if not, write to the Free Software
  41. + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  42. + *
  43. + * History:
  44. + * 31-Jul-2002 : Initial version [FB]
  45. + * 29-Jan-2003 : added PXA255 support [FB]
  46. + * 20-Apr-2003 : ported to v2.5 (Dustin McIntire, Sensoria Corp.)
  47. + *
  48. + * Note:
  49. + * This driver may change the memory bus clock rate, but will not do any
  50. + * platform specific access timing changes... for example if you have flash
  51. + * memory connected to CS0, you will need to register a platform specific
  52. + * notifier which will adjust the memory access strobes to maintain a
  53. + * minimum strobe width.
  54. + *
  55. + */
  56. +
  57. +#include <linux/kernel.h>
  58. +#include <linux/module.h>
  59. +#include <linux/sched.h>
  60. +#include <linux/init.h>
  61. +#include <linux/cpufreq.h>
  62. +
  63. +#include <asm/hardware.h>
  64. +#include <asm/arch/pxa-regs.h>
  65. +
  66. +#undef DEBUG
  67. +
  68. +#ifdef DEBUG
  69. + static unsigned int freq_debug = DEBUG;
  70. + module_param(freq_debug, int, 0);
  71. + MODULE_PARM_DESC(freq_debug, "Set the debug messages to on=1/off=0");
  72. +#else
  73. + #define freq_debug 0
  74. +#endif
  75. +
  76. +typedef struct
  77. +{
  78. + unsigned int khz;
  79. + unsigned int membus;
  80. + unsigned int cccr;
  81. + unsigned int div2;
  82. +} pxa_freqs_t;
  83. +
  84. +/* Define the refresh period in mSec for the SDRAM and the number of rows */
  85. +#define SDRAM_TREF 64 /* standard 64ms SDRAM */
  86. +#define SDRAM_ROWS 2048 /* 64MB=8192 32MB=4096 */
  87. +#define MDREFR_DRI(x) ((x*SDRAM_TREF)/(SDRAM_ROWS*32))
  88. +
  89. +#define CCLKCFG_TURBO 0x1
  90. +#define CCLKCFG_FCS 0x2
  91. +#define PXA25x_MIN_FREQ 99533
  92. +#define PXA25x_MAX_FREQ 530842
  93. +#define MDREFR_DB2_MASK (MDREFR_K2DB2 | MDREFR_K1DB2)
  94. +#define MDREFR_DRI_MASK 0xFFF
  95. +
  96. +
  97. +/* Use the run mode frequencies for the CPUFREQ_POLICY_PERFORMANCE policy */
  98. +static pxa_freqs_t pxa255_run_freqs[] =
  99. +{
  100. + /* CPU MEMBUS CCCR DIV2*/
  101. + { 99533, 99533, 0x121, 1}, /* run= 99, turbo= 99, PXbus=50, SDRAM=50 */
  102. + {132710, 132710, 0x123, 1}, /* run=133, turbo=133, PXbus=66, SDRAM=66 */
  103. + {199066, 99533, 0x141, 0}, /* run=199, turbo=199, PXbus=99, SDRAM=99 */
  104. + {265421, 132710, 0x143, 0}, /* run=265, turbo=265, PXbus=133, SDRAM=133 */
  105. + {331776, 165888, 0x145, 1}, /* run=331, turbo=331, PXbus=166, SDRAM=83 */
  106. + {398131, 99533, 0x161, 0}, /* run=398, turbo=398, PXbus=99, SDRAM=99 */
  107. + {398131, 132710, 0x1c3, 0}, /* run=265, turbo=398, PXbus=133, SDRAM=133 */
  108. + {530842, 132710, 0x163, 0}, /* run=531, turbo=531, PXbus=133, SDRAM=133 */
  109. + {0,}
  110. +};
  111. +#define NUM_RUN_FREQS (sizeof(pxa255_run_freqs)/sizeof(pxa_freqs_t))
  112. +
  113. +static struct cpufreq_frequency_table pxa255_run_freq_table[NUM_RUN_FREQS+1];
  114. +
  115. +/* Use the turbo mode frequencies for the CPUFREQ_POLICY_POWERSAVE policy */
  116. +static pxa_freqs_t pxa255_turbo_freqs[] =
  117. +{
  118. + /* CPU MEMBUS CCCR DIV2*/
  119. + { 99533, 99533, 0x121, 1}, /* run=99, turbo= 99, PXbus=99, SDRAM=50 */
  120. + {149299, 99533, 0x1a1, 0}, /* run=99, turbo=149, PXbus=99, SDRAM=99 */
  121. + {199066, 99533, 0x221, 0}, /* run=99, turbo=199, PXbus=99, SDRAM=99 */
  122. + {298598, 99533, 0x321, 0}, /* run=99, turbo=299, PXbus=99, SDRAM=99 */
  123. + {398131, 99533, 0x241, 1}, /* run=199, turbo=398, PXbus=99, SDRAM=50 */
  124. + {0,}
  125. +};
  126. +#define NUM_TURBO_FREQS (sizeof(pxa255_turbo_freqs)/sizeof(pxa_freqs_t))
  127. +
  128. +static struct cpufreq_frequency_table pxa255_turbo_freq_table[NUM_TURBO_FREQS+1];
  129. +
  130. +extern unsigned get_clk_frequency_khz(int info);
  131. +
  132. +/* find a valid frequency point */
  133. +static int pxa_verify_policy(struct cpufreq_policy *policy)
  134. +{
  135. + int ret;
  136. + struct cpufreq_frequency_table *pxa_freqs_table;
  137. +
  138. + if(policy->policy == CPUFREQ_POLICY_PERFORMANCE) {
  139. + pxa_freqs_table = pxa255_run_freq_table;
  140. + } else if (policy->policy == CPUFREQ_POLICY_POWERSAVE) {
  141. + pxa_freqs_table = pxa255_turbo_freq_table;
  142. + } else {
  143. + printk("CPU PXA: Unknown policy found. "
  144. + "Using CPUFREQ_POLICY_PERFORMANCE\n");
  145. + pxa_freqs_table = pxa255_run_freq_table;
  146. + }
  147. + ret=cpufreq_frequency_table_verify(policy, pxa_freqs_table);
  148. +
  149. + if(freq_debug) {
  150. + printk("Verified CPU policy: %dKhz min to %dKhz max\n",
  151. + policy->min, policy->max);
  152. + }
  153. +
  154. + return ret;
  155. +}
  156. +
  157. +static int pxa_set_target(struct cpufreq_policy *policy,
  158. + unsigned int target_freq,
  159. + unsigned int relation)
  160. +{
  161. + int idx;
  162. + cpumask_t cpus_allowed;
  163. + int cpu = policy->cpu;
  164. + struct cpufreq_freqs freqs;
  165. + pxa_freqs_t *pxa_freq_settings;
  166. + struct cpufreq_frequency_table *pxa_freqs_table;
  167. + unsigned long flags;
  168. + unsigned int unused;
  169. + unsigned int preset_mdrefr, postset_mdrefr;
  170. + void *ramstart;
  171. +
  172. + /*
  173. + * Save this threads cpus_allowed mask.
  174. + */
  175. + cpus_allowed = current->cpus_allowed;
  176. +
  177. + /*
  178. + * Bind to the specified CPU. When this call returns,
  179. + * we should be running on the right CPU.
  180. + */
  181. + set_cpus_allowed(current, cpumask_of_cpu(cpu));
  182. + BUG_ON(cpu != smp_processor_id());
  183. +
  184. + /* Get the current policy */
  185. + if(policy->policy == CPUFREQ_POLICY_PERFORMANCE) {
  186. + pxa_freq_settings = pxa255_run_freqs;
  187. + pxa_freqs_table = pxa255_run_freq_table;
  188. + }else if (policy->policy == CPUFREQ_POLICY_POWERSAVE) {
  189. + pxa_freq_settings = pxa255_turbo_freqs;
  190. + pxa_freqs_table = pxa255_turbo_freq_table;
  191. + }else {
  192. + printk("CPU PXA: Unknown policy found. "
  193. + "Using CPUFREQ_POLICY_PERFORMANCE\n");
  194. + pxa_freq_settings = pxa255_run_freqs;
  195. + pxa_freqs_table = pxa255_run_freq_table;
  196. + }
  197. +
  198. + /* Lookup the next frequency */
  199. + if (cpufreq_frequency_table_target(policy, pxa_freqs_table,
  200. + target_freq, relation, &idx)) {
  201. + return -EINVAL;
  202. + }
  203. +
  204. + freqs.old = policy->cur;
  205. + freqs.new = pxa_freq_settings[idx].khz;
  206. + freqs.cpu = policy->cpu;
  207. + if(freq_debug) {
  208. + printk(KERN_INFO "Changing CPU frequency to %d Mhz, (SDRAM %d Mhz)\n",
  209. + freqs.new/1000, (pxa_freq_settings[idx].div2) ?
  210. + (pxa_freq_settings[idx].membus/2000) :
  211. + (pxa_freq_settings[idx].membus/1000));
  212. + }
  213. +
  214. + ramstart = phys_to_virt(0xa0000000);
  215. +
  216. + /*
  217. + * Tell everyone what we're about to do...
  218. + * you should add a notify client with any platform specific
  219. + * Vcc changing capability
  220. + */
  221. + cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
  222. +
  223. + /* Calculate the next MDREFR. If we're slowing down the SDRAM clock
  224. + * we need to preset the smaller DRI before the change. If we're speeding
  225. + * up we need to set the larger DRI value after the change.
  226. + */
  227. + preset_mdrefr = postset_mdrefr = MDREFR;
  228. + if((MDREFR & MDREFR_DRI_MASK) > MDREFR_DRI(pxa_freq_settings[idx].membus)) {
  229. + preset_mdrefr = (preset_mdrefr & ~MDREFR_DRI_MASK) |
  230. + MDREFR_DRI(pxa_freq_settings[idx].membus);
  231. + }
  232. + postset_mdrefr = (postset_mdrefr & ~MDREFR_DRI_MASK) |
  233. + MDREFR_DRI(pxa_freq_settings[idx].membus);
  234. +
  235. + /* If we're dividing the memory clock by two for the SDRAM clock, this
  236. + * must be set prior to the change. Clearing the divide must be done
  237. + * after the change.
  238. + */
  239. + if(pxa_freq_settings[idx].div2) {
  240. + preset_mdrefr |= MDREFR_DB2_MASK;
  241. + postset_mdrefr |= MDREFR_DB2_MASK;
  242. + } else {
  243. + postset_mdrefr &= ~MDREFR_DB2_MASK;
  244. + }
  245. +
  246. + local_irq_save(flags);
  247. +
  248. + /* Set new the CCCR */
  249. + CCCR = pxa_freq_settings[idx].cccr;
  250. +
  251. + __asm__ __volatile__(" \
  252. + ldr r4, [%1] ; /* load MDREFR */ \
  253. + b 2f ; \
  254. + .align 5 ; \
  255. +1: \
  256. + str %4, [%1] ; /* preset the MDREFR */ \
  257. + mcr p14, 0, %2, c6, c0, 0 ; /* set CCLKCFG[FCS] */ \
  258. + str %5, [%1] ; /* postset the MDREFR */ \
  259. + \
  260. + b 3f ; \
  261. +2: b 1b ; \
  262. +3: nop ; \
  263. + "
  264. + : "=&r" (unused)
  265. + : "r" (&MDREFR), "r" (CCLKCFG_TURBO|CCLKCFG_FCS), "r" (ramstart), \
  266. + "r" (preset_mdrefr), "r" (postset_mdrefr)
  267. + : "r4", "r5");
  268. + local_irq_restore(flags);
  269. +
  270. + /*
  271. + * Restore the CPUs allowed mask.
  272. + */
  273. + set_cpus_allowed(current, cpus_allowed);
  274. +
  275. + /*
  276. + * Tell everyone what we've just done...
  277. + * you should add a notify client with any platform specific
  278. + * SDRAM refresh timer adjustments
  279. + */
  280. + cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
  281. +
  282. + return 0;
  283. +}
  284. +
  285. +static int pxa_cpufreq_init(struct cpufreq_policy *policy)
  286. +{
  287. + cpumask_t cpus_allowed;
  288. + unsigned int cpu = policy->cpu;
  289. + int i;
  290. +
  291. + cpus_allowed = current->cpus_allowed;
  292. +
  293. + set_cpus_allowed(current, cpumask_of_cpu(cpu));
  294. + BUG_ON(cpu != smp_processor_id());
  295. +
  296. + /* set default policy and cpuinfo */
  297. + policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
  298. + policy->policy = CPUFREQ_POLICY_PERFORMANCE;
  299. + policy->cpuinfo.max_freq = PXA25x_MAX_FREQ;
  300. + policy->cpuinfo.min_freq = PXA25x_MIN_FREQ;
  301. + policy->cpuinfo.transition_latency = 1000; /* FIXME: 1 ms, assumed */
  302. + policy->cur = get_clk_frequency_khz(0); /* current freq */
  303. + policy->min = policy->max = policy->cur;
  304. +
  305. + /* Generate the run cpufreq_frequency_table struct */
  306. + for(i=0;i<NUM_RUN_FREQS;i++) {
  307. + pxa255_run_freq_table[i].frequency = pxa255_run_freqs[i].khz;
  308. + pxa255_run_freq_table[i].index = i;
  309. + }
  310. + pxa255_run_freq_table[i].frequency = CPUFREQ_TABLE_END;
  311. + /* Generate the turbo cpufreq_frequency_table struct */
  312. + for(i=0;i<NUM_TURBO_FREQS;i++) {
  313. + pxa255_turbo_freq_table[i].frequency = pxa255_turbo_freqs[i].khz;
  314. + pxa255_turbo_freq_table[i].index = i;
  315. + }
  316. + pxa255_turbo_freq_table[i].frequency = CPUFREQ_TABLE_END;
  317. +
  318. + set_cpus_allowed(current, cpus_allowed);
  319. + printk(KERN_INFO "PXA CPU frequency change support initialized\n");
  320. +
  321. + return 0;
  322. +}
  323. +
  324. +static struct cpufreq_driver pxa_cpufreq_driver = {
  325. + .verify = pxa_verify_policy,
  326. + .target = pxa_set_target,
  327. + .init = pxa_cpufreq_init,
  328. + .name = "PXA25x",
  329. +};
  330. +
  331. +static int __init pxa_cpu_init(void)
  332. +{
  333. + return cpufreq_register_driver(&pxa_cpufreq_driver);
  334. +}
  335. +
  336. +static void __exit pxa_cpu_exit(void)
  337. +{
  338. + cpufreq_unregister_driver(&pxa_cpufreq_driver);
  339. +}
  340. +
  341. +
  342. +MODULE_AUTHOR ("Intrinsyc Software Inc.");
  343. +MODULE_DESCRIPTION ("CPU frequency changing driver for the PXA architecture");
  344. +MODULE_LICENSE("GPL");
  345. +module_init(pxa_cpu_init);
  346. +module_exit(pxa_cpu_exit);
  347. +
  348. diff -Nurbw linux-2.6.17/arch/arm/mach-pxa/Makefile linux-2.6.17-patched/arch/arm/mach-pxa/Makefile
  349. --- linux-2.6.17/arch/arm/mach-pxa/Makefile 2006-09-21 15:11:33.000000000 -0700
  350. +++ linux-2.6.17-patched/arch/arm/mach-pxa/Makefile 2006-09-21 14:57:02.000000000 -0700
  351. @@ -30,5 +30,6 @@
  352. obj-$(CONFIG_PM) += pm.o sleep.o
  353. obj-$(CONFIG_PXA_SSP) += ssp.o
  354. +obj-$(CONFIG_CPU_FREQ) += cpu-pxa.o
  355. ifeq ($(CONFIG_PXA27x),y)
  356. obj-$(CONFIG_PM) += standby.o
  357. diff -Nurbw linux-2.6.17/Documentation/cpu-freq/user-guide.txt linux-2.6.17-patched/Documentation/cpu-freq/user-guide.txt
  358. --- linux-2.6.17/Documentation/cpu-freq/user-guide.txt 2006-06-17 18:49:35.000000000 -0700
  359. +++ linux-2.6.17-patched/Documentation/cpu-freq/user-guide.txt 2006-09-21 14:57:02.000000000 -0700
  360. @@ -18,7 +18,7 @@
  361. Contents:
  362. ---------
  363. 1. Supported Architectures and Processors
  364. -1.1 ARM
  365. +1.1 ARM, PXA
  366. 1.2 x86
  367. 1.3 sparc64
  368. 1.4 ppc
  369. @@ -37,14 +37,15 @@
  370. 1. Supported Architectures and Processors
  371. =========================================
  372. -1.1 ARM
  373. --------
  374. +1.1 ARM, PXA
  375. +------------
  376. The following ARM processors are supported by cpufreq:
  377. ARM Integrator
  378. ARM-SA1100
  379. ARM-SA1110
  380. +Intel PXA
  381. 1.2 x86
  382. diff -Nurbw linux-2.6.17/drivers/cpufreq/Kconfig linux-2.6.17-patched/drivers/cpufreq/Kconfig
  383. --- linux-2.6.17/drivers/cpufreq/Kconfig 2006-06-17 18:49:35.000000000 -0700
  384. +++ linux-2.6.17-patched/drivers/cpufreq/Kconfig 2006-09-21 15:06:12.000000000 -0700
  385. @@ -46,13 +46,9 @@
  386. This will show detail CPU frequency translation table in sysfs file
  387. system
  388. -# Note that it is not currently possible to set the other governors (such as ondemand)
  389. -# as the default, since if they fail to initialise, cpufreq will be
  390. -# left in an undefined state.
  391. -
  392. choice
  393. prompt "Default CPUFreq governor"
  394. - default CPU_FREQ_DEFAULT_GOV_USERSPACE if CPU_FREQ_SA1100 || CPU_FREQ_SA1110
  395. + default CPU_FREQ_DEFAULT_GOV_USERSPACE if CPU_FREQ_SA1100 || CPU_FREQ_SA1110 || CPU_FREQ_PXA
  396. default CPU_FREQ_DEFAULT_GOV_PERFORMANCE
  397. help
  398. This option sets which CPUFreq governor shall be loaded at
  399. @@ -66,6 +62,14 @@
  400. the frequency statically to the highest frequency supported by
  401. the CPU.
  402. +config CPU_FREQ_DEFAULT_GOV_POWERSAVE
  403. + bool "powersave"
  404. + select CPU_FREQ_GOV_POWERSAVE
  405. + help
  406. + Use the CPUFreq governor 'powersave' as default. This sets
  407. + the frequency statically to the lowest frequency supported by
  408. + the CPU.
  409. +
  410. config CPU_FREQ_DEFAULT_GOV_USERSPACE
  411. bool "userspace"
  412. select CPU_FREQ_GOV_USERSPACE
  413. @@ -75,6 +79,23 @@
  414. program shall be able to set the CPU dynamically without having
  415. to enable the userspace governor manually.
  416. +config CPU_FREQ_DEFAULT_GOV_ONDEMAND
  417. + bool "ondemand"
  418. + select CPU_FREQ_GOV_ONDEMAND
  419. + help
  420. + Use the CPUFreq governor 'ondemand' as default. This sets
  421. + the frequency dynamically based on CPU load, throttling up
  422. + and down as necessary.
  423. +
  424. +config CPU_FREQ_DEFAULT_GOV_CONSERVATIVE
  425. + bool "conservative"
  426. + select CPU_FREQ_GOV_CONSERVATIVE
  427. + help
  428. + Use the CPUFreq governor 'conservative' as default. This sets
  429. + the frequency dynamically based on CPU load, throttling up
  430. + and down as necessary. The frequency is gracefully increased
  431. + and decreased rather than jumping to 100% when speed is required.
  432. +
  433. endchoice
  434. config CPU_FREQ_GOV_PERFORMANCE
  435. diff -Nurbw linux-2.6.17/include/linux/cpufreq.h linux-2.6.17-patched/include/linux/cpufreq.h
  436. --- linux-2.6.17/include/linux/cpufreq.h 2006-06-17 18:49:35.000000000 -0700
  437. +++ linux-2.6.17-patched/include/linux/cpufreq.h 2006-09-21 15:08:35.000000000 -0700
  438. @@ -276,9 +276,18 @@
  439. #ifdef CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE
  440. extern struct cpufreq_governor cpufreq_gov_performance;
  441. #define CPUFREQ_DEFAULT_GOVERNOR &cpufreq_gov_performance
  442. +#elif defined(CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE)
  443. +extern struct cpufreq_governor cpufreq_gov_powersave;
  444. +#define CPUFREQ_DEFAULT_GOVERNOR &cpufreq_gov_powersave
  445. #elif defined(CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE)
  446. extern struct cpufreq_governor cpufreq_gov_userspace;
  447. #define CPUFREQ_DEFAULT_GOVERNOR &cpufreq_gov_userspace
  448. +#elif defined(CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND)
  449. +extern struct cpufreq_governor cpufreq_gov_ondemand;
  450. +#define CPUFREQ_DEFAULT_GOVERNOR &cpufreq_gov_ondemand;
  451. +#elif defined(CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE)
  452. +extern struct cpufreq_governor cpufreq_gov_conservative;
  453. +#define CPUFREQ_DEFAULT_GOVERNOR &cpufreq_gov_conservative;
  454. #endif
  455. diff -Nubrw --exclude='.*.o.cmd' linux-2.6.17/drivers/cpufreq/cpufreq_conservative.c linux-2.6.17-patched/drivers/cpufreq/cpufreq_conservative.c
  456. --- linux-2.6.17/drivers/cpufreq/cpufreq_conservative.c 2006-09-21 15:26:46.000000000 -0700
  457. +++ linux-2.6.17-patched/drivers/cpufreq/cpufreq_conservative.c 2006-06-17 18:49:35.000000000 -0700
  458. @@ -529,7 +529,7 @@
  459. return 0;
  460. }
  461. -static struct cpufreq_governor cpufreq_gov_dbs = {
  462. +struct cpufreq_governor cpufreq_gov_conservative = {
  463. .name = "conservative",
  464. .governor = cpufreq_governor_dbs,
  465. .owner = THIS_MODULE,
  466. @@ -537,7 +537,7 @@
  467. static int __init cpufreq_gov_dbs_init(void)
  468. {
  469. - return cpufreq_register_governor(&cpufreq_gov_dbs);
  470. + return cpufreq_register_governor(&cpufreq_gov_conservative);
  471. }
  472. static void __exit cpufreq_gov_dbs_exit(void)
  473. @@ -545,7 +545,7 @@
  474. /* Make sure that the scheduled work is indeed not running */
  475. flush_scheduled_work();
  476. - cpufreq_unregister_governor(&cpufreq_gov_dbs);
  477. + cpufreq_unregister_governor(&cpufreq_gov_conservative);
  478. }
  479. diff -Nubrw --exclude='.*.o.cmd' linux-2.6.17/drivers/cpufreq/cpufreq_ondemand.c linux-2.6.17-patched/drivers/cpufreq/cpufreq_ondemand.c
  480. --- linux-2.6.17/drivers/cpufreq/cpufreq_ondemand.c 2006-06-17 18:49:35.000000000 -0700
  481. +++ linux-2.6.17-patched/drivers/cpufreq/cpufreq_ondemand.c 2006-09-27 14:00:15.000000000 -0700
  482. @@ -484,7 +484,7 @@
  483. return 0;
  484. }
  485. -static struct cpufreq_governor cpufreq_gov_dbs = {
  486. +struct cpufreq_governor cpufreq_gov_ondemand = {
  487. .name = "ondemand",
  488. .governor = cpufreq_governor_dbs,
  489. .owner = THIS_MODULE,
  490. @@ -492,7 +492,7 @@
  491. static int __init cpufreq_gov_dbs_init(void)
  492. {
  493. - return cpufreq_register_governor(&cpufreq_gov_dbs);
  494. + return cpufreq_register_governor(&cpufreq_gov_ondemand);
  495. }
  496. static void __exit cpufreq_gov_dbs_exit(void)
  497. @@ -504,7 +504,7 @@
  498. destroy_workqueue(dbs_workq);
  499. }
  500. - cpufreq_unregister_governor(&cpufreq_gov_dbs);
  501. + cpufreq_unregister_governor(&cpufreq_gov_ondemand);
  502. }