rdc3210.c 12 KB

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  1. /*******************************************************************
  2. * Simple Flash mapping for RDC3210 *
  3. * *
  4. * 2005.03.23 *
  5. * Dante Su ([email protected]) *
  6. * Copyright (C) 2005 Gemtek Corporation *
  7. *******************************************************************/
  8. #include <linux/module.h>
  9. #include <linux/types.h>
  10. #include <linux/kernel.h>
  11. #include <asm/io.h>
  12. #include <linux/mtd/mtd.h>
  13. #include <linux/mtd/map.h>
  14. #include <linux/mtd/partitions.h>
  15. #include <linux/autoconf.h>
  16. #include <linux/sched.h>
  17. #include <linux/magic.h>
  18. static struct mtd_info *rdc3210_mtd;
  19. struct map_info rdc3210_map =
  20. {
  21. .name = "RDC3210 Flash",
  22. .size = CONFIG_MTD_RDC3210_SIZE,
  23. .bankwidth = CONFIG_MTD_RDC3210_BUSWIDTH,
  24. };
  25. /* Dante: This is the default static mapping, however this is nothing but a hint. (Say dynamic mapping) */
  26. static struct mtd_partition rdc3210_parts[] =
  27. {
  28. #if CONFIG_MTD_RDC3210_SIZE == 0x400000
  29. { name: "linux", offset: 0, size: 0x003C0000 }, /* 3840 KB = (Kernel + ROMFS) = (768 KB + 3072 KB) */
  30. { name: "romfs", offset: 0x000C0000, size: 0x00300000 }, /* 3072 KB */
  31. { name: "nvram", offset: 0x003C0000, size: 0x00010000 }, /* 64 KB */
  32. #ifdef CONFIG_MTD_RDC3210_FACTORY_PRESENT
  33. { name: "factory", offset: 0x003D0000, size: 0x00010000 }, /* 64 KB */
  34. #endif
  35. { name: "bootldr", offset: 0x003E0000, size: 0x00020000 }, /* 128 KB */
  36. #elif CONFIG_MTD_RDC3210_SIZE == 0x200000
  37. { name: "linux", offset: 0x00008000, size: 0x001E8000 },
  38. { name: "romfs", offset: 0x000C8000, size: 0x00128000 },
  39. { name: "nvram", offset: 0x00000000, size: 0x00008000 }, /* 64 KB */
  40. #ifdef CONFIG_MTD_RDC3210_FACTORY_PRESENT
  41. #error Unsupported configuration!
  42. #endif
  43. { name: "bootldr", offset: 0x001F0000, size: 0x00010000 },
  44. #elif CONFIG_MTD_RDC3210_SIZE == 0x800000
  45. { name: "linux", offset: 0, size: 0x001F0000 }, /* 1984 KB */
  46. { name: "config", offset: 0x001F0000, size: 0x00010000 }, /* 64 KB */
  47. { name: "romfs", offset: 0x00200000, size: 0x005D0000 }, /* 5952 KB */
  48. #ifdef CONFIG_MTD_RDC3210_FACTORY_PRESENT
  49. { name: "factory", offset: 0x007D0000, size: 0x00010000 }, /* 64 KB */
  50. #endif
  51. { name: "bootldr", offset: 0x007E0000, size: 0x00010000 }, /* 64 KB */
  52. #else
  53. #error Unsupported configuration!
  54. #endif
  55. };
  56. static __u32 crctab[257] = {
  57. 0x00000000, 0x77073096, 0xee0e612c, 0x990951ba,
  58. 0x076dc419, 0x706af48f, 0xe963a535, 0x9e6495a3,
  59. 0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988,
  60. 0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91,
  61. 0x1db71064, 0x6ab020f2, 0xf3b97148, 0x84be41de,
  62. 0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7,
  63. 0x136c9856, 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec,
  64. 0x14015c4f, 0x63066cd9, 0xfa0f3d63, 0x8d080df5,
  65. 0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172,
  66. 0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b,
  67. 0x35b5a8fa, 0x42b2986c, 0xdbbbc9d6, 0xacbcf940,
  68. 0x32d86ce3, 0x45df5c75, 0xdcd60dcf, 0xabd13d59,
  69. 0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116,
  70. 0x21b4f4b5, 0x56b3c423, 0xcfba9599, 0xb8bda50f,
  71. 0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924,
  72. 0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d,
  73. 0x76dc4190, 0x01db7106, 0x98d220bc, 0xefd5102a,
  74. 0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433,
  75. 0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818,
  76. 0x7f6a0dbb, 0x086d3d2d, 0x91646c97, 0xe6635c01,
  77. 0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e,
  78. 0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457,
  79. 0x65b0d9c6, 0x12b7e950, 0x8bbeb8ea, 0xfcb9887c,
  80. 0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65,
  81. 0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2,
  82. 0x4adfa541, 0x3dd895d7, 0xa4d1c46d, 0xd3d6f4fb,
  83. 0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0,
  84. 0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9,
  85. 0x5005713c, 0x270241aa, 0xbe0b1010, 0xc90c2086,
  86. 0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f,
  87. 0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4,
  88. 0x59b33d17, 0x2eb40d81, 0xb7bd5c3b, 0xc0ba6cad,
  89. 0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a,
  90. 0xead54739, 0x9dd277af, 0x04db2615, 0x73dc1683,
  91. 0xe3630b12, 0x94643b84, 0x0d6d6a3e, 0x7a6a5aa8,
  92. 0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1,
  93. 0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe,
  94. 0xf762575d, 0x806567cb, 0x196c3671, 0x6e6b06e7,
  95. 0xfed41b76, 0x89d32be0, 0x10da7a5a, 0x67dd4acc,
  96. 0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5,
  97. 0xd6d6a3e8, 0xa1d1937e, 0x38d8c2c4, 0x4fdff252,
  98. 0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b,
  99. 0xd80d2bda, 0xaf0a1b4c, 0x36034af6, 0x41047a60,
  100. 0xdf60efc3, 0xa867df55, 0x316e8eef, 0x4669be79,
  101. 0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236,
  102. 0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f,
  103. 0xc5ba3bbe, 0xb2bd0b28, 0x2bb45a92, 0x5cb36a04,
  104. 0xc2d7ffa7, 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d,
  105. 0x9b64c2b0, 0xec63f226, 0x756aa39c, 0x026d930a,
  106. 0x9c0906a9, 0xeb0e363f, 0x72076785, 0x05005713,
  107. 0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38,
  108. 0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21,
  109. 0x86d3d2d4, 0xf1d4e242, 0x68ddb3f8, 0x1fda836e,
  110. 0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777,
  111. 0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c,
  112. 0x8f659eff, 0xf862ae69, 0x616bffd3, 0x166ccf45,
  113. 0xa00ae278, 0xd70dd2ee, 0x4e048354, 0x3903b3c2,
  114. 0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db,
  115. 0xaed16a4a, 0xd9d65adc, 0x40df0b66, 0x37d83bf0,
  116. 0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9,
  117. 0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6,
  118. 0xbad03605, 0xcdd70693, 0x54de5729, 0x23d967bf,
  119. 0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94,
  120. 0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d,
  121. 0
  122. };
  123. static __u32 crc32(__u8 * buf, __u32 len)
  124. {
  125. register int i;
  126. __u32 sum;
  127. register __u32 s0;
  128. s0 = ~0;
  129. for (i = 0; i < len; i++) {
  130. s0 = (s0 >> 8) ^ crctab[(__u8) (s0 & 0xFF) ^ buf[i]];
  131. }
  132. sum = ~s0;
  133. return sum;
  134. }
  135. static void erase_callback(struct erase_info *done)
  136. {
  137. wait_queue_head_t *wait_q = (wait_queue_head_t *)done->priv;
  138. wake_up(wait_q);
  139. }
  140. static int erase_write (struct mtd_info *mtd, unsigned long pos,
  141. int len, const char *buf)
  142. {
  143. struct erase_info erase;
  144. DECLARE_WAITQUEUE(wait, current);
  145. wait_queue_head_t wait_q;
  146. size_t retlen;
  147. int ret;
  148. /*
  149. * First, let's erase the flash block.
  150. */
  151. init_waitqueue_head(&wait_q);
  152. erase.mtd = mtd;
  153. erase.callback = erase_callback;
  154. erase.addr = pos;
  155. erase.len = len;
  156. erase.priv = (u_long)&wait_q;
  157. set_current_state(TASK_INTERRUPTIBLE);
  158. add_wait_queue(&wait_q, &wait);
  159. ret = mtd->erase(mtd, &erase);
  160. if (ret) {
  161. set_current_state(TASK_RUNNING);
  162. remove_wait_queue(&wait_q, &wait);
  163. printk (KERN_WARNING "erase of region [0x%lx, 0x%x] "
  164. "on \"%s\" failed\n",
  165. pos, len, mtd->name);
  166. return ret;
  167. }
  168. schedule(); /* Wait for erase to finish. */
  169. remove_wait_queue(&wait_q, &wait);
  170. /*
  171. * Next, writhe data to flash.
  172. */
  173. ret = mtd->write (mtd, pos, len, &retlen, buf);
  174. if (ret)
  175. return ret;
  176. if (retlen != len)
  177. return -EIO;
  178. return 0;
  179. }
  180. static int __init init_rdc3210_map(void)
  181. {
  182. rdc3210_map.phys = -rdc3210_map.size;
  183. printk(KERN_NOTICE "flash device: %lx at %x\n", rdc3210_map.size, rdc3210_map.phys);
  184. #if CONFIG_MTD_RDC3210_SIZE == 0x800000
  185. simple_map_init(&rdc3210_map);
  186. #endif
  187. rdc3210_map.map_priv_1 = (unsigned long)(rdc3210_map.virt = ioremap_nocache(rdc3210_map.phys, rdc3210_map.size));
  188. if (!rdc3210_map.map_priv_1)
  189. {
  190. printk("Failed to ioremap\n");
  191. return -EIO;
  192. }
  193. rdc3210_mtd = do_map_probe("cfi_probe", &rdc3210_map);
  194. #ifdef CONFIG_MTD_RDC3210_STATIC_MAP /* Dante: This is for fixed map */
  195. if (rdc3210_mtd)
  196. {
  197. rdc3210_mtd->owner = THIS_MODULE;
  198. add_mtd_partitions(rdc3210_mtd, rdc3210_parts, sizeof(rdc3210_parts)/sizeof(rdc3210_parts[0]));
  199. return 0;
  200. }
  201. #else /* Dante: This is for dynamic mapping */
  202. #include "imghdr.h"
  203. typedef struct {
  204. u8 magic[4];
  205. u32 kernelsz, ramdisksz;
  206. u8 magic2[4];
  207. u32 sz2;
  208. }sc_imghdr_t;
  209. if (rdc3210_mtd)
  210. { // Dante
  211. sc_imghdr_t *hdr2= (sc_imghdr_t *)(rdc3210_map.map_priv_1);
  212. gt_imghdr_t *hdr = (gt_imghdr_t *)hdr2
  213. #ifdef CONFIG_MTD_RDC3210_ALLOW_JFFS2
  214. , *ptmp
  215. #endif
  216. ;
  217. int len, tmp, tmp2, tmp3, tmp4, hdr_type = 0;
  218. if(!memcmp(hdr->magic, GTIMG_MAGIC, 4))
  219. {
  220. hdr_type = 1;
  221. tmp = hdr->kernelsz + sizeof(gt_imghdr_t);
  222. tmp2 = rdc3210_mtd->erasesize;
  223. tmp3 = ((tmp / 32) + ((tmp % 32) ? 1 : 0)) * 32;
  224. tmp4 = ((tmp / tmp2) + ((tmp % tmp2) ? 1 : 0)) * tmp2;
  225. }
  226. #ifndef CONFIG_MTD_RDC3210_ALLOW_JFFS2
  227. else if (!memcmp(hdr2->magic, "CSYS", 4))
  228. {
  229. hdr_type = 2;
  230. tmp = hdr2->ramdisksz + hdr2->kernelsz + sizeof(sc_imghdr_t);
  231. tmp2 = rdc3210_mtd->erasesize;
  232. tmp3 = ((tmp / 32) + ((tmp % 32) ? 1 : 0)) * 32;
  233. tmp4 = ((tmp / tmp2) + ((tmp % tmp2) ? 1 : 0)) * tmp2;
  234. }
  235. #endif
  236. else
  237. {
  238. iounmap((void *)rdc3210_map.map_priv_1);
  239. rdc3210_map.map_priv_1 = 0L;
  240. rdc3210_map.virt = NULL;
  241. printk("Invalid MAGIC for Firmware Image!!!\n");
  242. return -EIO;
  243. }
  244. #ifdef CONFIG_MTD_RDC3210_ALLOW_JFFS2
  245. tmp = (tmp3 == tmp4) ? tmp4 + tmp2 : tmp4;
  246. if ((ptmp = (gt_imghdr_t *)vmalloc(tmp)) == NULL)
  247. {
  248. iounmap((void *)rdc3210_map.map_priv_1);
  249. rdc3210_map.map_priv_1 = 0L;
  250. rdc3210_map.virt = NULL;
  251. printk("Can't allocate 0x%08x for flash-reading buffer!\n", tmp);
  252. return -ENOMEM;
  253. }
  254. if (rdc3210_mtd->read(rdc3210_mtd, 0, tmp, &len, (__u8 *)ptmp) || len != tmp)
  255. {
  256. vfree(ptmp);
  257. iounmap((void *)rdc3210_map.map_priv_1);
  258. rdc3210_map.map_priv_1 = 0L;
  259. rdc3210_map.virt = NULL;
  260. printk("Can't read that much flash! Read 0x%08x of it.\n", len);
  261. return -EIO;
  262. }
  263. #endif
  264. #ifdef CONFIG_MTD_RDC3210_FACTORY_PRESENT
  265. /* 1. Adjust Redboot */
  266. tmp = rdc3210_mtd->size - rdc3210_parts[4].size;
  267. rdc3210_parts[4].offset = tmp - (tmp % tmp2);
  268. rdc3210_parts[4].size = rdc3210_mtd->size - rdc3210_parts[4].offset;
  269. /* 2. Adjust Factory Default */
  270. tmp -= rdc3210_parts[3].size;
  271. rdc3210_parts[3].offset = tmp - (tmp % tmp2);
  272. rdc3210_parts[3].size = rdc3210_parts[4].offset - rdc3210_parts[3].offset;
  273. #else
  274. /* 1. Adjust Redboot */
  275. tmp = rdc3210_mtd->size - rdc3210_parts[3].size;
  276. rdc3210_parts[3].offset = tmp - (tmp % tmp2);
  277. rdc3210_parts[3].size = rdc3210_mtd->size - rdc3210_parts[3].offset;
  278. #endif
  279. if (hdr_type == 1) {
  280. /* 3. Adjust NVRAM */
  281. #ifdef CONFIG_MTD_RDC3210_ALLOW_JFFS2
  282. if (*(__u32 *)(((unsigned char *)ptmp)+tmp3) == SQUASHFS_MAGIC)
  283. {
  284. len = 1;
  285. tmp4 = tmp3;
  286. tmp = hdr->imagesz;
  287. rdc3210_parts[2].name = "rootfs_data";
  288. rdc3210_parts[2].offset = rdc3210_parts[0].offset + (((tmp / tmp2) + ((tmp % tmp2) ? 1 : 0)) * tmp2);
  289. }
  290. else
  291. #else
  292. tmp4 = tmp3;
  293. #endif
  294. {
  295. len = 0;
  296. tmp -= rdc3210_parts[2].size;
  297. rdc3210_parts[2].offset = tmp - (tmp % tmp2);
  298. }
  299. rdc3210_parts[2].size = rdc3210_parts[3].offset - rdc3210_parts[2].offset;
  300. }
  301. else if (hdr_type == 2)
  302. {
  303. len = 0;
  304. tmp4 = tmp3;
  305. }
  306. /* 4. Adjust Linux (Kernel + ROMFS) */
  307. rdc3210_parts[0].size = rdc3210_parts[len + hdr_type + 1].offset - rdc3210_parts[0].offset;
  308. /* 5. Adjust ROMFS */
  309. rdc3210_parts[1].offset = rdc3210_parts[0].offset + tmp4;
  310. rdc3210_parts[1].size = rdc3210_parts[hdr_type + 1].offset - rdc3210_parts[1].offset;
  311. #ifdef CONFIG_MTD_RDC3210_ALLOW_JFFS2
  312. if (!(hdr->reserved || len))
  313. {
  314. __u8 buf[1024];
  315. ptmp->reserved = hdr->imagesz;
  316. ptmp->imagesz = tmp4;
  317. ptmp->checksum = ptmp->fastcksum = 0;
  318. memcpy(buf, ptmp, 0x100);
  319. memcpy(buf + 0x100, ((__u8 *)ptmp) + ((tmp4 >> 1) - ((tmp4 & 0x6) >> 1)), 0x100);
  320. memcpy(buf + 0x200, ((__u8 *)ptmp) + (tmp4 - 0x200), 0x200);
  321. ptmp->fastcksum = crc32(buf, sizeof(buf));
  322. ptmp->checksum = crc32((__u8 *)ptmp, tmp4);
  323. if (rdc3210_mtd->unlock) rdc3210_mtd->unlock(rdc3210_mtd, 0, tmp2);
  324. if ((len = erase_write(rdc3210_mtd, 0, tmp2, (char *)ptmp)))
  325. {
  326. vfree(ptmp);
  327. iounmap((void *)rdc3210_map.map_priv_1);
  328. rdc3210_map.map_priv_1 = 0L;
  329. rdc3210_map.virt = NULL;
  330. printk("Couldn't erase! Got %d.\n", len);
  331. return len;
  332. }
  333. if (rdc3210_mtd->sync) rdc3210_mtd->sync(rdc3210_mtd);
  334. }
  335. vfree(ptmp);
  336. #endif
  337. rdc3210_mtd->owner = THIS_MODULE;
  338. add_mtd_partitions(rdc3210_mtd, rdc3210_parts, sizeof(rdc3210_parts)/sizeof(rdc3210_parts[0]));
  339. return 0;
  340. }
  341. #endif
  342. iounmap((void *)rdc3210_map.map_priv_1);
  343. rdc3210_map.map_priv_1 = 0L;
  344. rdc3210_map.virt = NULL;
  345. return -ENXIO;
  346. }
  347. static void __exit cleanup_rdc3210_map(void)
  348. {
  349. if (rdc3210_mtd)
  350. {
  351. del_mtd_partitions(rdc3210_mtd);
  352. map_destroy(rdc3210_mtd);
  353. }
  354. if (rdc3210_map.map_priv_1)
  355. {
  356. iounmap((void *)rdc3210_map.map_priv_1);
  357. rdc3210_map.map_priv_1 = 0L;
  358. rdc3210_map.virt = NULL;
  359. }
  360. }
  361. module_init(init_rdc3210_map);
  362. module_exit(cleanup_rdc3210_map);