qcom-ipq8064-wpq864.dts 7.2 KB

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  1. // SPDX-License-Identifier: BSD-3-Clause
  2. /*
  3. * Copyright (C) 2017 Christian Mehlis <[email protected]>
  4. * Copyright (C) 2018 Mathias Kresin <[email protected]>
  5. * All rights reserved.
  6. */
  7. #include "qcom-ipq8064-v1.0.dtsi"
  8. #include <dt-bindings/input/input.h>
  9. #include <dt-bindings/soc/qcom,tcsr.h>
  10. / {
  11. compatible = "compex,wpq864", "qcom,ipq8064";
  12. model = "Compex WPQ864";
  13. aliases {
  14. mdio-gpio0 = &mdio0;
  15. ethernet0 = &gmac1;
  16. ethernet1 = &gmac0;
  17. led-boot = &led_pass;
  18. led-failsafe = &led_fail;
  19. led-running = &led_pass;
  20. led-upgrade = &led_pass;
  21. };
  22. leds {
  23. compatible = "gpio-leds";
  24. pinctrl-0 = <&led_pins>;
  25. pinctrl-names = "default";
  26. rss4 {
  27. label = "green:rss4";
  28. gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
  29. };
  30. rss3 {
  31. label = "green:rss3";
  32. gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
  33. default-state = "keep";
  34. };
  35. rss2 {
  36. label = "orange:rss2";
  37. gpios = <&qcom_pinmux 25 GPIO_ACTIVE_HIGH>;
  38. };
  39. rss1 {
  40. label = "red:rss1";
  41. gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
  42. };
  43. led_pass: pass {
  44. label = "green:pass";
  45. gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
  46. };
  47. led_fail: fail {
  48. label = "green:fail";
  49. gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
  50. };
  51. usb {
  52. label = "green:usb";
  53. gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
  54. };
  55. usb-pcie {
  56. label = "green:usb-pcie";
  57. gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
  58. };
  59. };
  60. keys {
  61. compatible = "gpio-keys";
  62. pinctrl-0 = <&button_pins>;
  63. pinctrl-names = "default";
  64. reset {
  65. label = "reset";
  66. gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
  67. linux,code = <KEY_RESTART>;
  68. debounce-interval = <60>;
  69. wakeup-source;
  70. };
  71. };
  72. beeper {
  73. compatible = "gpio-beeper";
  74. pinctrl-0 = <&beeper_pins>;
  75. pinctrl-names = "default";
  76. gpios = <&qcom_pinmux 55 GPIO_ACTIVE_HIGH>;
  77. };
  78. };
  79. &rpm {
  80. pinctrl-0 = <&rpm_pins>;
  81. pinctrl-names = "default";
  82. };
  83. &nand_controller {
  84. status = "okay";
  85. pinctrl-0 = <&nand_pins>;
  86. pinctrl-names = "default";
  87. mt29f2g08abbeah4@0 {
  88. compatible = "qcom,nandcs";
  89. reg = <0>;
  90. nand-ecc-strength = <4>;
  91. nand-bus-width = <8>;
  92. nand-ecc-step-size = <512>;
  93. nand-is-boot-medium;
  94. qcom,boot_pages_size = <0x1180000>;
  95. partitions {
  96. compatible = "fixed-partitions";
  97. #address-cells = <1>;
  98. #size-cells = <1>;
  99. SBL1@0 {
  100. label = "SBL1";
  101. reg = <0x0000000 0x0040000>;
  102. read-only;
  103. };
  104. MIBIB@40000 {
  105. label = "MIBIB";
  106. reg = <0x0040000 0x0140000>;
  107. read-only;
  108. };
  109. SBL2@180000 {
  110. label = "SBL2";
  111. reg = <0x0180000 0x0140000>;
  112. read-only;
  113. };
  114. SBL3@2c0000 {
  115. label = "SBL3";
  116. reg = <0x02c0000 0x0280000>;
  117. read-only;
  118. };
  119. DDRCONFIG@540000 {
  120. label = "DDRCONFIG";
  121. reg = <0x0540000 0x0120000>;
  122. read-only;
  123. };
  124. SSD@660000 {
  125. label = "SSD";
  126. reg = <0x0660000 0x0120000>;
  127. read-only;
  128. };
  129. TZ@780000 {
  130. label = "TZ";
  131. reg = <0x0780000 0x0280000>;
  132. read-only;
  133. };
  134. RPM@a00000 {
  135. label = "RPM";
  136. reg = <0x0a00000 0x0280000>;
  137. read-only;
  138. };
  139. APPSBL@c80000 {
  140. label = "APPSBL";
  141. reg = <0x0c80000 0x0500000>;
  142. read-only;
  143. };
  144. APPSBLENV@1180000 {
  145. label = "APPSBLENV";
  146. reg = <0x1180000 0x0080000>;
  147. };
  148. ART@1200000 {
  149. label = "ART";
  150. reg = <0x1200000 0x0140000>;
  151. };
  152. ubi@1340000 {
  153. label = "ubi";
  154. reg = <0x1340000 0x4000000>;
  155. };
  156. BOOTCONFIG@5340000 {
  157. label = "BOOTCONFIG";
  158. reg = <0x5340000 0x0060000>;
  159. };
  160. SBL2-1@53a0000- {
  161. label = "SBL2_1";
  162. reg = <0x53a0000 0x0140000>;
  163. read-only;
  164. };
  165. SBL3-1@54e0000 {
  166. label = "SBL3_1";
  167. reg = <0x54e0000 0x0280000>;
  168. read-only;
  169. };
  170. DDRCONFIG-1@5760000 {
  171. label = "DDRCONFIG_1";
  172. reg = <0x5760000 0x0120000>;
  173. read-only;
  174. };
  175. SSD-1@5880000 {
  176. label = "SSD_1";
  177. reg = <0x5880000 0x0120000>;
  178. read-only;
  179. };
  180. TZ-1@59a0000 {
  181. label = "TZ_1";
  182. reg = <0x59a0000 0x0280000>;
  183. read-only;
  184. };
  185. RPM-1@5c20000 {
  186. label = "RPM_1";
  187. reg = <0x5c20000 0x0280000>;
  188. read-only;
  189. };
  190. BOOTCONFIG1@5ea0000 {
  191. label = "BOOTCONFIG1";
  192. reg = <0x5ea0000 0x0060000>;
  193. };
  194. APPSBL-1@5f00000 {
  195. label = "APPSBL_1";
  196. reg = <0x5f00000 0x0500000>;
  197. read-only;
  198. };
  199. ubi-1@6400000 {
  200. label = "ubi_1";
  201. reg = <0x6400000 0x4000000>;
  202. };
  203. unused@a400000 {
  204. label = "unused";
  205. reg = <0xa400000 0x5c00000>;
  206. };
  207. };
  208. };
  209. };
  210. &adm_dma {
  211. status = "okay";
  212. };
  213. &mdio0 {
  214. status = "okay";
  215. pinctrl-0 = <&mdio0_pins>;
  216. pinctrl-names = "default";
  217. ethernet-phy@0 {
  218. reg = <0>;
  219. qca,ar8327-initvals = <
  220. 0x00004 0x7600000 /* PAD0_MODE */
  221. 0x00008 0x1000000 /* PAD5_MODE */
  222. 0x0000c 0x80 /* PAD6_MODE */
  223. 0x000e4 0x6a545 /* MAC_POWER_SEL */
  224. 0x000e0 0xc74164de /* SGMII_CTRL */
  225. 0x0007c 0x4e /* PORT0_STATUS */
  226. 0x00094 0x4e /* PORT6_STATUS */
  227. >;
  228. };
  229. ethernet-phy@4 {
  230. reg = <4>;
  231. };
  232. };
  233. &gmac1 {
  234. status = "okay";
  235. pinctrl-0 = <&rgmii2_pins>;
  236. pinctrl-names = "default";
  237. phy-mode = "rgmii";
  238. qcom,id = <1>;
  239. fixed-link {
  240. speed = <1000>;
  241. full-duplex;
  242. };
  243. };
  244. &gmac2 {
  245. status = "okay";
  246. phy-mode = "sgmii";
  247. qcom,id = <2>;
  248. fixed-link {
  249. speed = <1000>;
  250. full-duplex;
  251. };
  252. };
  253. &gsbi4_serial {
  254. pinctrl-0 = <&uart0_pins>;
  255. pinctrl-names = "default";
  256. };
  257. &flash {
  258. compatible = "jedec,spi-nor";
  259. };
  260. &sata_phy {
  261. status = "disabled";
  262. };
  263. &sata {
  264. status = "disabled";
  265. };
  266. &ss_phy_0 { /* USB3 port 0 SS phy */
  267. status = "okay";
  268. rx_eq = <2>;
  269. tx_deamp_3_5db = <32>;
  270. mpll = <160>;
  271. };
  272. &ss_phy_1 { /* USB3 port 1 SS phy */
  273. status = "okay";
  274. rx_eq = <2>;
  275. tx_deamp_3_5db = <32>;
  276. mpll = <160>;
  277. };
  278. &pcie0 {
  279. status = "okay";
  280. /delete-property/ pinctrl-0;
  281. /delete-property/ pinctrl-names;
  282. /delete-property/ perst-gpios;
  283. };
  284. &pcie1 {
  285. status = "okay";
  286. };
  287. &pcie2 {
  288. status = "okay";
  289. /delete-property/ pinctrl-0;
  290. /delete-property/ pinctrl-names;
  291. /delete-property/ perst-gpios;
  292. };
  293. &qcom_pinmux {
  294. pinctrl-names = "default";
  295. pinctrl-0 = <&state_default>;
  296. state_default: pinctrl0 {
  297. pcie0_pcie2_perst {
  298. pins = "gpio3";
  299. function = "gpio";
  300. drive-strength = <2>;
  301. bias-disable;
  302. output-high;
  303. };
  304. };
  305. led_pins: led_pins {
  306. mux {
  307. pins = "gpio7", "gpio8", "gpio9", "gpio22",
  308. "gpio23", "gpio24", "gpio25", "gpio53";
  309. function = "gpio";
  310. drive-strength = <2>;
  311. bias-pull-up;
  312. };
  313. };
  314. button_pins: button_pins {
  315. mux {
  316. pins = "gpio54";
  317. function = "gpio";
  318. drive-strength = <2>;
  319. bias-pull-up;
  320. };
  321. };
  322. beeper_pins: beeper_pins {
  323. mux {
  324. pins = "gpio55";
  325. function = "gpio";
  326. drive-strength = <2>;
  327. bias-pull-up;
  328. };
  329. };
  330. rpm_pins: rpm_pins {
  331. mux {
  332. pins = "gpio12", "gpio13";
  333. function = "gsbi4";
  334. drive-strength = <10>;
  335. bias-disable;
  336. };
  337. };
  338. uart0_pins: uart0_pins {
  339. mux {
  340. pins = "gpio10", "gpio11";
  341. function = "gsbi4";
  342. drive-strength = <10>;
  343. bias-disable;
  344. };
  345. };
  346. spi_pins: spi_pins {
  347. mux {
  348. pins = "gpio18", "gpio19";
  349. function = "gsbi5";
  350. drive-strength = <10>;
  351. bias-pull-down;
  352. };
  353. clk {
  354. pins = "gpio21";
  355. function = "gsbi5";
  356. drive-strength = <12>;
  357. bias-pull-down;
  358. };
  359. cs {
  360. pins = "gpio20";
  361. function = "gpio";
  362. drive-strength = <10>;
  363. bias-pull-up;
  364. };
  365. };
  366. };
  367. &usb3_0 {
  368. status = "okay";
  369. };
  370. &usb3_1 {
  371. status = "okay";
  372. };
  373. &tcsr {
  374. qcom,usb-ctrl-select = <TCSR_USB_SELECT_USB3_DUAL>;
  375. };