mt7986a-jdcloud-re-cp-03.dts 5.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  2. /*
  3. * Copyright (C) 2023 Tianling Shen <[email protected]>
  4. */
  5. /dts-v1/;
  6. #include <dt-bindings/gpio/gpio.h>
  7. #include <dt-bindings/input/input.h>
  8. #include <dt-bindings/leds/common.h>
  9. #include "mt7986a.dtsi"
  10. / {
  11. model = "JDCloud RE-CP-03";
  12. compatible = "jdcloud,re-cp-03", "mediatek,mt7986a";
  13. aliases {
  14. led-boot = &red_led;
  15. led-failsafe = &red_led;
  16. led-running = &green_led;
  17. led-upgrade = &green_led;
  18. serial0 = &uart0;
  19. };
  20. chosen {
  21. bootargs-override = "root=/dev/fit0 rootwait";
  22. stdout-path = "serial0:115200n8";
  23. rootdisk = <&emmc_rootdisk>;
  24. };
  25. memory@40000000 {
  26. reg = <0 0x40000000 0 0x40000000>;
  27. };
  28. gpio-keys {
  29. compatible = "gpio-keys";
  30. button-joylink {
  31. label = "joylink";
  32. linux,code = <BTN_0>;
  33. gpios = <&pio 10 GPIO_ACTIVE_LOW>;
  34. };
  35. button-reset {
  36. label = "reset";
  37. linux,code = <KEY_RESTART>;
  38. gpios = <&pio 9 GPIO_ACTIVE_LOW>;
  39. };
  40. };
  41. gpio-leds {
  42. compatible = "gpio-leds";
  43. led-0 {
  44. color = <LED_COLOR_ID_BLUE>;
  45. function = LED_FUNCTION_STATUS;
  46. gpios = <&pio 7 GPIO_ACTIVE_HIGH>;
  47. };
  48. red_led: led-1 {
  49. color = <LED_COLOR_ID_RED>;
  50. function = LED_FUNCTION_STATUS;
  51. gpios = <&pio 11 GPIO_ACTIVE_HIGH>;
  52. };
  53. green_led: led-2 {
  54. color = <LED_COLOR_ID_GREEN>;
  55. function = LED_FUNCTION_STATUS;
  56. gpios = <&pio 12 GPIO_ACTIVE_LOW>;
  57. };
  58. };
  59. reg_1p8v: regulator-1p8v {
  60. compatible = "regulator-fixed";
  61. regulator-name = "fixed-1.8V";
  62. regulator-min-microvolt = <1800000>;
  63. regulator-max-microvolt = <1800000>;
  64. regulator-boot-on;
  65. regulator-always-on;
  66. };
  67. reg_3p3v: regulator-3p3v {
  68. compatible = "regulator-fixed";
  69. regulator-name = "fixed-3.3V";
  70. regulator-min-microvolt = <3300000>;
  71. regulator-max-microvolt = <3300000>;
  72. regulator-boot-on;
  73. regulator-always-on;
  74. };
  75. };
  76. &crypto {
  77. status = "okay";
  78. };
  79. &eth {
  80. status = "okay";
  81. gmac0: mac@0 {
  82. compatible = "mediatek,eth-mac";
  83. reg = <0>;
  84. phy-mode = "2500base-x";
  85. fixed-link {
  86. speed = <2500>;
  87. full-duplex;
  88. pause;
  89. };
  90. };
  91. gmac1: mac@1 {
  92. compatible = "mediatek,eth-mac";
  93. reg = <1>;
  94. phy-mode = "2500base-x";
  95. phy-handle = <&phy6>;
  96. };
  97. mdio: mdio-bus {
  98. #address-cells = <1>;
  99. #size-cells = <0>;
  100. };
  101. };
  102. &mdio {
  103. phy6: phy@6 {
  104. compatible = "ethernet-phy-ieee802.3-c45";
  105. reg = <6>;
  106. reset-gpios = <&pio 6 GPIO_ACTIVE_LOW>;
  107. reset-assert-us = <10000>;
  108. reset-deassert-us = <50000>;
  109. realtek,aldps-enable;
  110. };
  111. switch: switch@1f {
  112. compatible = "mediatek,mt7531";
  113. reg = <31>;
  114. reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
  115. interrupt-controller;
  116. #interrupt-cells = <1>;
  117. interrupt-parent = <&pio>;
  118. interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
  119. };
  120. };
  121. &mmc0 {
  122. bus-width = <8>;
  123. cap-mmc-highspeed;
  124. hs400-ds-delay = <0x14014>;
  125. max-frequency = <200000000>;
  126. mmc-hs200-1_8v;
  127. mmc-hs400-1_8v;
  128. no-sd;
  129. no-sdio;
  130. non-removable;
  131. pinctrl-names = "default", "state_uhs";
  132. pinctrl-0 = <&mmc0_pins_default>;
  133. pinctrl-1 = <&mmc0_pins_uhs>;
  134. vmmc-supply = <&reg_3p3v>;
  135. vqmmc-supply = <&reg_1p8v>;
  136. status = "okay";
  137. card@0 {
  138. compatible = "mmc-card";
  139. reg = <0>;
  140. block {
  141. compatible = "block-device";
  142. partitions {
  143. emmc_rootdisk: block-partition-production {
  144. partname = "production";
  145. };
  146. };
  147. };
  148. };
  149. };
  150. &pio {
  151. mmc0_pins_default: mmc0-pins-default {
  152. mux {
  153. function = "emmc";
  154. groups = "emmc_51";
  155. };
  156. conf-cmd-dat {
  157. pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
  158. "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
  159. "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
  160. input-enable;
  161. drive-strength = <4>;
  162. mediatek,pull-up-adv = <1>;
  163. };
  164. conf-clk {
  165. pins = "EMMC_CK";
  166. drive-strength = <6>;
  167. mediatek,pull-down-adv = <2>;
  168. };
  169. conf-ds {
  170. pins = "EMMC_DSL";
  171. mediatek,pull-down-adv = <2>;
  172. };
  173. conf-rst {
  174. pins = "EMMC_RSTB";
  175. drive-strength = <4>;
  176. mediatek,pull-up-adv = <1>;
  177. };
  178. };
  179. mmc0_pins_uhs: mmc0-uhs-pins {
  180. mux {
  181. function = "emmc";
  182. groups = "emmc_51";
  183. };
  184. conf-cmd-dat {
  185. pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
  186. "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
  187. "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
  188. input-enable;
  189. drive-strength = <4>;
  190. mediatek,pull-up-adv = <1>;
  191. };
  192. conf-clk {
  193. pins = "EMMC_CK";
  194. drive-strength = <6>;
  195. mediatek,pull-down-adv = <2>;
  196. };
  197. conf-ds {
  198. pins = "EMMC_DSL";
  199. mediatek,pull-down-adv = <2>;
  200. };
  201. conf-rst {
  202. pins = "EMMC_RSTB";
  203. drive-strength = <4>;
  204. mediatek,pull-up-adv = <1>;
  205. };
  206. };
  207. wf_2g_5g_pins: wf-2g-5g-pins {
  208. mux {
  209. function = "wifi";
  210. groups = "wf_2g", "wf_5g";
  211. };
  212. conf {
  213. pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
  214. "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
  215. "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
  216. "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
  217. "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
  218. "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
  219. "WF1_TOP_CLK", "WF1_TOP_DATA";
  220. drive-strength = <4>;
  221. };
  222. };
  223. };
  224. &switch {
  225. ports {
  226. #address-cells = <1>;
  227. #size-cells = <0>;
  228. port@1 {
  229. reg = <1>;
  230. label = "lan1";
  231. };
  232. port@2 {
  233. reg = <2>;
  234. label = "lan2";
  235. };
  236. port@3 {
  237. reg = <3>;
  238. label = "lan3";
  239. };
  240. port@4 {
  241. reg = <4>;
  242. label = "lan4";
  243. };
  244. port@6 {
  245. reg = <6>;
  246. ethernet = <&gmac0>;
  247. phy-mode = "2500base-x";
  248. fixed-link {
  249. speed = <2500>;
  250. full-duplex;
  251. pause;
  252. };
  253. };
  254. };
  255. };
  256. &trng {
  257. status = "okay";
  258. };
  259. &uart0 {
  260. status = "okay";
  261. };
  262. &watchdog {
  263. status = "okay";
  264. };
  265. &wifi {
  266. pinctrl-names = "default";
  267. pinctrl-0 = <&wf_2g_5g_pins>;
  268. status = "okay";
  269. };