rt3883.dtsi 6.7 KB

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  1. / {
  2. #address-cells = <1>;
  3. #size-cells = <1>;
  4. compatible = "ralink,rt3883-soc";
  5. cpus {
  6. cpu@0 {
  7. compatible = "mips,mips74Kc";
  8. };
  9. };
  10. chosen {
  11. bootargs = "console=ttyS0,57600";
  12. };
  13. aliases {
  14. spi0 = &spi0;
  15. };
  16. cpuintc: cpuintc@0 {
  17. #address-cells = <0>;
  18. #interrupt-cells = <1>;
  19. interrupt-controller;
  20. compatible = "mti,cpu-interrupt-controller";
  21. };
  22. palmbus@10000000 {
  23. compatible = "palmbus";
  24. reg = <0x10000000 0x200000>;
  25. ranges = <0x0 0x10000000 0x1FFFFF>;
  26. #address-cells = <1>;
  27. #size-cells = <1>;
  28. sysc@0 {
  29. compatible = "ralink,rt3883-sysc", "ralink,rt3050-sysc";
  30. reg = <0x0 0x100>;
  31. };
  32. timer@100 {
  33. compatible = "ralink,rt3883-timer", "ralink,rt2880-timer";
  34. reg = <0x100 0x20>;
  35. interrupt-parent = <&intc>;
  36. interrupts = <1>;
  37. };
  38. watchdog@120 {
  39. compatible = "ralink,rt3883-wdt", "ralink,rt2880-wdt";
  40. reg = <0x120 0x10>;
  41. resets = <&rstctrl 8>;
  42. reset-names = "wdt";
  43. interrupt-parent = <&intc>;
  44. interrupts = <1>;
  45. };
  46. intc: intc@200 {
  47. compatible = "ralink,rt3883-intc", "ralink,rt2880-intc";
  48. reg = <0x200 0x100>;
  49. resets = <&rstctrl 19>;
  50. reset-names = "intc";
  51. interrupt-controller;
  52. #interrupt-cells = <1>;
  53. interrupt-parent = <&cpuintc>;
  54. interrupts = <2>;
  55. };
  56. memc@300 {
  57. compatible = "ralink,rt3883-memc", "ralink,rt3050-memc";
  58. reg = <0x300 0x100>;
  59. resets = <&rstctrl 20>;
  60. reset-names = "mc";
  61. interrupt-parent = <&intc>;
  62. interrupts = <3>;
  63. };
  64. uart@500 {
  65. compatible = "ralink,rt3883-uart", "ralink,rt2880-uart", "ns16550a";
  66. reg = <0x500 0x100>;
  67. resets = <&rstctrl 12>;
  68. reset-names = "uart";
  69. interrupt-parent = <&intc>;
  70. interrupts = <5>;
  71. reg-shift = <2>;
  72. status = "disabled";
  73. };
  74. gpio0: gpio@600 {
  75. compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
  76. reg = <0x600 0x34>;
  77. resets = <&rstctrl 13>;
  78. reset-names = "pio";
  79. interrupt-parent = <&intc>;
  80. interrupts = <6>;
  81. gpio-controller;
  82. #gpio-cells = <2>;
  83. ralink,gpio-base = <0>;
  84. ralink,num-gpios = <24>;
  85. ralink,register-map = [ 00 04 08 0c
  86. 20 24 28 2c
  87. 30 34 ];
  88. };
  89. gpio1: gpio@638 {
  90. compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
  91. reg = <0x638 0x24>;
  92. gpio-controller;
  93. #gpio-cells = <2>;
  94. ralink,gpio-base = <24>;
  95. ralink,num-gpios = <16>;
  96. ralink,register-map = [ 00 04 08 0c
  97. 10 14 18 1c
  98. 20 24 ];
  99. status = "disabled";
  100. };
  101. gpio2: gpio@660 {
  102. compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
  103. reg = <0x660 0x24>;
  104. gpio-controller;
  105. #gpio-cells = <2>;
  106. ralink,gpio-base = <40>;
  107. ralink,num-gpios = <32>;
  108. ralink,register-map = [ 00 04 08 0c
  109. 10 14 18 1c
  110. 20 24 ];
  111. status = "disabled";
  112. };
  113. gpio3: gpio@688 {
  114. compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
  115. reg = <0x688 0x24>;
  116. gpio-controller;
  117. #gpio-cells = <2>;
  118. ralink,gpio-base = <72>;
  119. ralink,num-gpios = <24>;
  120. ralink,register-map = [ 00 04 08 0c
  121. 10 14 18 1c
  122. 20 24 ];
  123. status = "disabled";
  124. };
  125. spi0: spi@b00 {
  126. compatible = "ralink,rt3883-spi", "ralink,rt2880-spi";
  127. reg = <0xb00 0x100>;
  128. #address-cells = <1>;
  129. #size-cells = <0>;
  130. resets = <&rstctrl 18>;
  131. reset-names = "spi";
  132. pinctrl-names = "default";
  133. pinctrl-0 = <&spi_pins>;
  134. status = "disabled";
  135. };
  136. uartlite@c00 {
  137. compatible = "ralink,rt3883-uart", "ralink,rt2880-uart", "ns16550a";
  138. reg = <0xc00 0x100>;
  139. resets = <&rstctrl 19>;
  140. reset-names = "uartl";
  141. interrupt-parent = <&intc>;
  142. interrupts = <12>;
  143. reg-shift = <2>;
  144. pinctrl-names = "default";
  145. pinctrl-0 = <&uartlite_pins>;
  146. };
  147. };
  148. pinctrl {
  149. compatible = "ralink,rt2880-pinmux";
  150. pinctrl-names = "default";
  151. pinctrl-0 = <&state_default>;
  152. state_default: pinctrl0 {
  153. };
  154. spi_pins: spi {
  155. spi {
  156. ralink,group = "spi";
  157. ralink,function = "spi";
  158. };
  159. };
  160. uartlite_pins: uartlite {
  161. uart {
  162. ralink,group = "uartlite";
  163. ralink,function = "uartlite";
  164. };
  165. };
  166. };
  167. ethernet@10100000 {
  168. compatible = "ralink,rt3883-eth";
  169. reg = <0x10100000 10000>;
  170. interrupt-parent = <&cpuintc>;
  171. interrupts = <5>;
  172. port@0 {
  173. compatible = "ralink,rt3883-port", "ralink,eth-port";
  174. reg = <0>;
  175. };
  176. mdio-bus {
  177. #address-cells = <1>;
  178. #size-cells = <0>;
  179. status = "disabled";
  180. };
  181. };
  182. rstctrl: rstctrl {
  183. compatible = "ralink,rt3883-reset", "ralink,rt2880-reset";
  184. #reset-cells = <1>;
  185. };
  186. pci@10140000 {
  187. compatible = "ralink,rt3883-pci";
  188. reg = <0x10140000 0x20000>;
  189. #address-cells = <1>;
  190. #size-cells = <1>;
  191. ranges; /* direct mapping */
  192. status = "disabled";
  193. pciintc: interrupt-controller {
  194. interrupt-controller;
  195. #address-cells = <0>;
  196. #interrupt-cells = <1>;
  197. interrupt-parent = <&cpuintc>;
  198. interrupts = <4>;
  199. };
  200. host-bridge {
  201. #address-cells = <3>;
  202. #size-cells = <2>;
  203. #interrupt-cells = <1>;
  204. device_type = "pci";
  205. bus-range = <0 255>;
  206. ranges = <
  207. 0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
  208. 0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
  209. >;
  210. interrupt-map-mask = <0xf800 0 0 7>;
  211. interrupt-map = <
  212. /* IDSEL 17 */
  213. 0x8800 0 0 1 &pciintc 18
  214. 0x8800 0 0 2 &pciintc 18
  215. 0x8800 0 0 3 &pciintc 18
  216. 0x8800 0 0 4 &pciintc 18
  217. /* IDSEL 18 */
  218. 0x9000 0 0 1 &pciintc 19
  219. 0x9000 0 0 2 &pciintc 19
  220. 0x9000 0 0 3 &pciintc 19
  221. 0x9000 0 0 4 &pciintc 19
  222. >;
  223. pci-bridge@1 {
  224. reg = <0x0800 0 0 0 0>;
  225. device_type = "pci";
  226. #interrupt-cells = <1>;
  227. #address-cells = <3>;
  228. #size-cells = <2>;
  229. status = "disabled";
  230. ralink,pci-slot = <1>;
  231. interrupt-map-mask = <0x0 0 0 0>;
  232. interrupt-map = <0x0 0 0 0 &pciintc 20>;
  233. };
  234. pci-slot@17 {
  235. reg = <0x8800 0 0 0 0>;
  236. device_type = "pci";
  237. #interrupt-cells = <1>;
  238. #address-cells = <3>;
  239. #size-cells = <2>;
  240. ralink,pci-slot = <17>;
  241. status = "disabled";
  242. };
  243. pci-slot@18 {
  244. reg = <0x9000 0 0 0 0>;
  245. device_type = "pci";
  246. #interrupt-cells = <1>;
  247. #address-cells = <3>;
  248. #size-cells = <2>;
  249. ralink,pci-slot = <18>;
  250. status = "disabled";
  251. };
  252. };
  253. };
  254. usbphy {
  255. compatible = "ralink,rt3xxx-usbphy";
  256. resets = <&rstctrl 22 &rstctrl 25>;
  257. reset-names = "host", "device";
  258. };
  259. wmac@10180000 {
  260. compatible = "ralink,rt3883-wmac", "ralink,rt2880-wmac";
  261. reg = <0x10180000 40000>;
  262. interrupt-parent = <&cpuintc>;
  263. interrupts = <6>;
  264. ralink,eeprom = "soc_wmac.eeprom";
  265. };
  266. ehci@101c0000 {
  267. compatible = "ralink,rt3xxx-ehci", "ehci-platform";
  268. reg = <0x101c0000 0x1000>;
  269. interrupt-parent = <&intc>;
  270. interrupts = <18>;
  271. status = "disabled";
  272. };
  273. ohci@101c1000 {
  274. compatible = "ralink,rt3xxx-ohci", "ohci-platform";
  275. reg = <0x101c1000 0x1000>;
  276. interrupt-parent = <&intc>;
  277. interrupts = <18>;
  278. status = "disabled";
  279. };
  280. };