qcom-ipq8065-r7800.dts 8.7 KB

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  1. #include "qcom-ipq8065-v1.0.dtsi"
  2. #include <dt-bindings/input/input.h>
  3. / {
  4. model = "Netgear Nighthawk X4S R7800";
  5. compatible = "netgear,r7800", "qcom,ipq8065", "qcom,ipq8064";
  6. memory@0 {
  7. reg = <0x42000000 0x1e000000>;
  8. device_type = "memory";
  9. };
  10. reserved-memory {
  11. #address-cells = <1>;
  12. #size-cells = <1>;
  13. ranges;
  14. rsvd@41200000 {
  15. reg = <0x41200000 0x300000>;
  16. no-map;
  17. };
  18. rsvd@5fe00000 {
  19. reg = <0x5fe00000 0x200000>;
  20. reusable;
  21. };
  22. };
  23. aliases {
  24. serial0 = &uart4;
  25. mdio-gpio0 = &mdio0;
  26. led-boot = &power_white;
  27. led-failsafe = &power_white;
  28. led-running = &power_white;
  29. led-upgrade = &power_amber;
  30. };
  31. chosen {
  32. linux,stdout-path = "serial0:115200n8";
  33. };
  34. soc {
  35. pinmux@800000 {
  36. pinctrl-0 = <&mdio0_pins &rgmii2_pins>;
  37. pinctrl-names = "default";
  38. i2c4_pins: i2c4_pinmux {
  39. mux {
  40. pins = "gpio12", "gpio13";
  41. function = "gsbi4";
  42. drive-strength = <12>;
  43. bias-disable;
  44. };
  45. };
  46. nand_pins: nand_pins {
  47. mux {
  48. pins = "gpio34", "gpio35", "gpio36",
  49. "gpio37", "gpio38", "gpio39",
  50. "gpio40", "gpio41", "gpio42",
  51. "gpio43", "gpio44", "gpio45",
  52. "gpio46", "gpio47";
  53. function = "nand";
  54. drive-strength = <10>;
  55. bias-disable;
  56. };
  57. pullups {
  58. pins = "gpio39";
  59. bias-pull-up;
  60. };
  61. hold {
  62. pins = "gpio40", "gpio41", "gpio42",
  63. "gpio43", "gpio44", "gpio45",
  64. "gpio46", "gpio47";
  65. bias-bus-hold;
  66. };
  67. };
  68. mdio0_pins: mdio0_pins {
  69. mux {
  70. pins = "gpio0", "gpio1";
  71. function = "gpio";
  72. drive-strength = <8>;
  73. bias-disable;
  74. };
  75. clk {
  76. pins = "gpio1";
  77. input-disable;
  78. };
  79. };
  80. rgmii2_pins: rgmii2_pins {
  81. mux {
  82. pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32",
  83. "gpio51", "gpio52", "gpio59", "gpio60", "gpio61", "gpio62" ;
  84. function = "rgmii2";
  85. drive-strength = <8>;
  86. bias-disable;
  87. };
  88. tx {
  89. pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32" ;
  90. input-disable;
  91. };
  92. };
  93. spi_pins: spi_pins {
  94. mux {
  95. pins = "gpio18", "gpio19", "gpio21";
  96. function = "gsbi5";
  97. drive-strength = <10>;
  98. bias-none;
  99. };
  100. cs {
  101. pins = "gpio20";
  102. drive-strength = <12>;
  103. };
  104. };
  105. };
  106. gsbi@16300000 {
  107. qcom,mode = <GSBI_PROT_I2C_UART>;
  108. status = "ok";
  109. serial@16340000 {
  110. status = "ok";
  111. };
  112. /*
  113. * The i2c device on gsbi4 should not be enabled.
  114. * On ipq806x designs gsbi4 i2c is meant for exclusive
  115. * RPM usage. Turning this on in kernel manifests as
  116. * i2c failure for the RPM.
  117. */
  118. };
  119. gsbi5: gsbi@1a200000 {
  120. qcom,mode = <GSBI_PROT_SPI>;
  121. status = "ok";
  122. spi4: spi@1a280000 {
  123. status = "ok";
  124. spi-max-frequency = <50000000>;
  125. pinctrl-0 = <&spi_pins>;
  126. pinctrl-names = "default";
  127. cs-gpios = <&qcom_pinmux 20 0>;
  128. flash: m25p80@0 {
  129. compatible = "s25fl512s";
  130. #address-cells = <1>;
  131. #size-cells = <1>;
  132. spi-max-frequency = <51200000>;
  133. reg = <0>;
  134. linux,part-probe = "qcom-smem";
  135. };
  136. };
  137. };
  138. sata-phy@1b400000 {
  139. status = "ok";
  140. };
  141. sata@29000000 {
  142. ports-implemented = <0x1>;
  143. status = "ok";
  144. };
  145. phy@100f8800 { /* USB3 port 1 HS phy */
  146. status = "ok";
  147. };
  148. phy@100f8830 { /* USB3 port 1 SS phy */
  149. status = "ok";
  150. };
  151. phy@110f8800 { /* USB3 port 0 HS phy */
  152. status = "ok";
  153. };
  154. phy@110f8830 { /* USB3 port 0 SS phy */
  155. status = "ok";
  156. };
  157. usb30@0 {
  158. status = "ok";
  159. };
  160. usb30@1 {
  161. status = "ok";
  162. };
  163. pcie0: pci@1b500000 {
  164. status = "ok";
  165. phy-tx0-term-offset = <7>;
  166. };
  167. pcie1: pci@1b700000 {
  168. status = "ok";
  169. phy-tx0-term-offset = <7>;
  170. };
  171. nand@1ac00000 {
  172. status = "ok";
  173. pinctrl-0 = <&nand_pins>;
  174. pinctrl-names = "default";
  175. nand-ecc-strength = <4>;
  176. nand-ecc-step-size = <512>;
  177. nand-bus-width = <8>;
  178. #address-cells = <1>;
  179. #size-cells = <1>;
  180. qcadata@0 {
  181. label = "qcadata";
  182. reg = <0x0000000 0x0c80000>;
  183. read-only;
  184. };
  185. APPSBL@c80000 {
  186. label = "APPSBL";
  187. reg = <0x0c80000 0x0500000>;
  188. read-only;
  189. };
  190. APPSBLENV@1180000 {
  191. label = "APPSBLENV";
  192. reg = <0x1180000 0x0080000>;
  193. read-only;
  194. };
  195. art: art@1200000 {
  196. label = "art";
  197. reg = <0x1200000 0x0140000>;
  198. read-only;
  199. };
  200. artbak: art@1340000 {
  201. label = "artbak";
  202. reg = <0x1340000 0x0140000>;
  203. read-only;
  204. };
  205. kernel@1480000 {
  206. label = "kernel";
  207. reg = <0x1480000 0x0200000>;
  208. };
  209. ubi@1680000 {
  210. label = "ubi";
  211. reg = <0x1680000 0x1E00000>;
  212. };
  213. netgear@3480000 {
  214. label = "netgear";
  215. reg = <0x3480000 0x4480000>;
  216. read-only;
  217. };
  218. reserve@7900000 {
  219. label = "reserve";
  220. reg = <0x7900000 0x0700000>;
  221. read-only;
  222. };
  223. firmware@1480000 {
  224. label = "firmware";
  225. reg = <0x1480000 0x2000000>;
  226. };
  227. };
  228. mdio0: mdio {
  229. compatible = "virtual,mdio-gpio";
  230. #address-cells = <1>;
  231. #size-cells = <0>;
  232. gpios = <&qcom_pinmux 1 0 &qcom_pinmux 0 0>;
  233. phy0: ethernet-phy@0 {
  234. device_type = "ethernet-phy";
  235. reg = <0>;
  236. qca,ar8327-initvals = <
  237. 0x00004 0x7600000 /* PAD0_MODE */
  238. 0x00008 0x1000000 /* PAD5_MODE */
  239. 0x0000c 0x80 /* PAD6_MODE */
  240. 0x000e4 0xaa545 /* MAC_POWER_SEL */
  241. 0x000e0 0xc74164de /* SGMII_CTRL */
  242. 0x0007c 0x4e /* PORT0_STATUS */
  243. 0x00094 0x4e /* PORT6_STATUS */
  244. 0x00970 0x1e864443 /* QM_PORT0_CTRL0 */
  245. 0x00974 0x000001c6 /* QM_PORT0_CTRL1 */
  246. 0x00978 0x19008643 /* QM_PORT1_CTRL0 */
  247. 0x0097c 0x000001c6 /* QM_PORT1_CTRL1 */
  248. 0x00980 0x19008643 /* QM_PORT2_CTRL0 */
  249. 0x00984 0x000001c6 /* QM_PORT2_CTRL1 */
  250. 0x00988 0x19008643 /* QM_PORT3_CTRL0 */
  251. 0x0098c 0x000001c6 /* QM_PORT3_CTRL1 */
  252. 0x00990 0x19008643 /* QM_PORT4_CTRL0 */
  253. 0x00994 0x000001c6 /* QM_PORT4_CTRL1 */
  254. 0x00998 0x1e864443 /* QM_PORT5_CTRL0 */
  255. 0x0099c 0x000001c6 /* QM_PORT5_CTRL1 */
  256. 0x009a0 0x1e864443 /* QM_PORT6_CTRL0 */
  257. 0x009a4 0x000001c6 /* QM_PORT6_CTRL1 */
  258. >;
  259. qca,ar8327-vlans = <
  260. 0x1 0x5e /* VLAN1 Ports 1/2/3/4/6 */
  261. 0x2 0x21 /* VLAN2 Ports 0/5 */
  262. >;
  263. };
  264. phy4: ethernet-phy@4 {
  265. device_type = "ethernet-phy";
  266. reg = <4>;
  267. qca,ar8327-initvals = <
  268. 0x000e4 0x6a545 /* MAC_POWER_SEL */
  269. 0x0000c 0x80 /* PAD6_MODE */
  270. >;
  271. };
  272. };
  273. gmac1: ethernet@37200000 {
  274. status = "ok";
  275. phy-mode = "rgmii";
  276. qcom,id = <1>;
  277. qcom,phy_mdio_addr = <4>;
  278. qcom,poll_required = <0>;
  279. qcom,rgmii_delay = <1>;
  280. qcom,phy_mii_type = <0>;
  281. qcom,emulation = <0>;
  282. qcom,irq = <255>;
  283. mdiobus = <&mdio0>;
  284. mtd-mac-address = <&art 6>;
  285. fixed-link {
  286. speed = <1000>;
  287. full-duplex;
  288. };
  289. };
  290. gmac2: ethernet@37400000 {
  291. status = "ok";
  292. phy-mode = "sgmii";
  293. qcom,id = <2>;
  294. qcom,phy_mdio_addr = <0>; /* none */
  295. qcom,poll_required = <0>; /* no polling */
  296. qcom,rgmii_delay = <0>;
  297. qcom,phy_mii_type = <1>;
  298. qcom,emulation = <0>;
  299. qcom,irq = <258>;
  300. mdiobus = <&mdio0>;
  301. mtd-mac-address = <&art 0>;
  302. fixed-link {
  303. speed = <1000>;
  304. full-duplex;
  305. };
  306. };
  307. rpm@108000 {
  308. pinctrl-0 = <&i2c4_pins>;
  309. pinctrl-names = "default";
  310. };
  311. };
  312. gpio-keys {
  313. compatible = "gpio-keys";
  314. wifi {
  315. label = "wifi";
  316. gpios = <&qcom_pinmux 6 1>;
  317. linux,code = <KEY_RFKILL>;
  318. };
  319. reset {
  320. label = "reset";
  321. gpios = <&qcom_pinmux 54 1>;
  322. linux,code = <KEY_RESTART>;
  323. };
  324. wps {
  325. label = "wps";
  326. gpios = <&qcom_pinmux 65 1>;
  327. linux,code = <KEY_WPS_BUTTON>;
  328. };
  329. };
  330. gpio-leds {
  331. compatible = "gpio-leds";
  332. power_white: power_white {
  333. label = "r7800:white:power";
  334. gpios = <&qcom_pinmux 53 0>;
  335. default-state = "on";
  336. };
  337. power_amber: power_amber {
  338. label = "r7800:amber:power";
  339. gpios = <&qcom_pinmux 9 0>;
  340. };
  341. wan_white {
  342. label = "r7800:white:wan";
  343. gpios = <&qcom_pinmux 22 0>;
  344. };
  345. wan_amber {
  346. label = "r7800:amber:wan";
  347. gpios = <&qcom_pinmux 23 0>;
  348. };
  349. usb1 {
  350. label = "r7800:white:usb1";
  351. gpios = <&qcom_pinmux 7 0>;
  352. };
  353. usb2 {
  354. label = "r7800:white:usb2";
  355. gpios = <&qcom_pinmux 8 0>;
  356. };
  357. esata {
  358. label = "r7800:white:esata";
  359. gpios = <&qcom_pinmux 26 0>;
  360. };
  361. rfkill {
  362. label = "r7800:white:rfkill";
  363. gpios = <&qcom_pinmux 64 0>;
  364. };
  365. wps {
  366. label = "r7800:white:wps";
  367. gpios = <&qcom_pinmux 24 0>;
  368. };
  369. wifi {
  370. label = "r7800:white:wifi";
  371. gpios = <&qcom_pinmux 67 0>;
  372. };
  373. };
  374. gpio_export {
  375. compatible = "gpio-export";
  376. #size-cells = <0>;
  377. display_data {
  378. gpio-export,name = "usb0";
  379. gpio-export,output = <1>;
  380. gpios = <&qcom_pinmux 15 0>;
  381. };
  382. display_clock {
  383. gpio-export,name = "usb1";
  384. gpio-export,output = <1>;
  385. gpios = <&qcom_pinmux 16 0>;
  386. };
  387. };
  388. };
  389. &adm_dma {
  390. status = "ok";
  391. };